mirror of
https://github.com/github/codeql.git
synced 2026-04-18 05:24:01 +02:00
Rust: Implement type inference for overloaded operators
This commit is contained in:
Simon Friis Vindum
@@ -28,6 +28,12 @@ module Impl {
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override string getOperatorName() { result = Generated::BinaryExpr.super.getOperatorName() }
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override Expr getAnOperand() { result = [this.getLhs(), this.getRhs()] }
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override int getNumberOfOperands() { result = 2 }
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override Expr getOperand(int n) {
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n = 0 and result = this.getLhs()
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or
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n = 1 and result = this.getRhs()
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}
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}
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}
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@@ -7,6 +7,78 @@
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private import rust
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private import codeql.rust.elements.internal.ExprImpl::Impl as ExprImpl
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/**
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* Holds if the operator `op` is overloaded to a trait with the canonical path
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* `path` and the method name `method`.
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*/
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private predicate isOverloaded(string op, string path, string method) {
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// Negation
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op = "-" and path = "core::ops::arith::Neg" and method = "neg"
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or
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// Not
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op = "!" and path = "core::ops::bit::Not" and method = "not"
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or
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// Dereference
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op = "*" and path = "core::ops::Deref" and method = "deref"
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or
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// Comparison operators
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op = "==" and path = "core::cmp::PartialEq" and method = "eq"
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or
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op = "!=" and path = "core::cmp::PartialEq" and method = "ne"
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or
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op = "<" and path = "core::cmp::PartialOrd" and method = "lt"
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or
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op = "<=" and path = "core::cmp::PartialOrd" and method = "le"
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or
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op = ">" and path = "core::cmp::PartialOrd" and method = "gt"
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or
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op = ">=" and path = "core::cmp::PartialOrd" and method = "ge"
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or
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// Arithmetic operators
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op = "+" and path = "core::ops::arith::Add" and method = "add"
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or
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op = "-" and path = "core::ops::arith::Sub" and method = "sub"
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or
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op = "*" and path = "core::ops::arith::Mul" and method = "mul"
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or
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op = "/" and path = "core::ops::arith::Div" and method = "div"
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or
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op = "%" and path = "core::ops::arith::Rem" and method = "rem"
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or
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// Arithmetic assignment expressions
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op = "+=" and path = "core::ops::arith::AddAssign" and method = "add_assign"
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or
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op = "-=" and path = "core::ops::arith::SubAssign" and method = "sub_assign"
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or
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op = "*=" and path = "core::ops::arith::MulAssign" and method = "mul_assign"
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or
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op = "/=" and path = "core::ops::arith::DivAssign" and method = "div_assign"
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or
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op = "%=" and path = "core::ops::arith::RemAssign" and method = "rem_assign"
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or
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// Bitwise operators
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op = "&" and path = "core::ops::bit::BitAnd" and method = "bitand"
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or
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op = "|" and path = "core::ops::bit::BitOr" and method = "bitor"
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or
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op = "^" and path = "core::ops::bit::BitXor" and method = "bitxor"
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or
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op = "<<" and path = "core::ops::bit::Shl" and method = "shl"
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or
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op = ">>" and path = "core::ops::bit::Shr" and method = "shr"
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or
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// Bitwise assignment operators
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op = "&=" and path = "core::ops::bit::BitAndAssign" and method = "bitand_assign"
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or
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op = "|=" and path = "core::ops::bit::BitOrAssign" and method = "bitor_assign"
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or
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op = "^=" and path = "core::ops::bit::BitXorAssign" and method = "bitxor_assign"
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or
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op = "<<=" and path = "core::ops::bit::ShlAssign" and method = "shl_assign"
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or
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op = ">>=" and path = "core::ops::bit::ShrAssign" and method = "shr_assign"
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}
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/**
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* INTERNAL: This module contains the customizable definition of `Operation` and should not
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* be referenced directly.
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@@ -16,14 +88,28 @@ module Impl {
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* An operation, for example `&&`, `+=`, `!` or `*`.
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*/
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abstract class Operation extends ExprImpl::Expr {
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/**
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* Gets the operator name of this operation, if it exists.
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*/
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/** Gets the operator name of this operation, if it exists. */
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abstract string getOperatorName();
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/** Gets the `n`th operand of this operation, if any. */
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abstract Expr getOperand(int n);
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/**
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* Gets an operand of this operation.
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* Gets the number of operands of this operation.
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*
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* This is either 1 for prefix operations, or 2 for binary operations.
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*/
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abstract Expr getAnOperand();
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abstract int getNumberOfOperands();
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/** Gets an operand of this operation. */
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Expr getAnOperand() { result = this.getOperand(_) }
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/**
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* Holds if this operation is overloaded to the method `methodName` of the
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* trait `trait`.
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*/
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predicate isOverloaded(Trait trait, string methodName) {
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isOverloaded(this.getOperatorName(), trait.getCanonicalPath(), methodName)
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}
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}
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}
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@@ -26,6 +26,8 @@ module Impl {
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override string getOperatorName() { result = Generated::PrefixExpr.super.getOperatorName() }
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override Expr getAnOperand() { result = this.getExpr() }
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override int getNumberOfOperands() { result = 1 }
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override Expr getOperand(int n) { n = 0 and result = this.getExpr() }
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}
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}
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@@ -29,7 +29,9 @@ module Impl {
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override string getOperatorName() { result = "&" }
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override Expr getAnOperand() { result = this.getExpr() }
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override int getNumberOfOperands() { result = 1 }
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override Expr getOperand(int n) { n = 0 and result = this.getExpr() }
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private string getSpecPart(int index) {
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index = 0 and this.isRaw() and result = "raw"
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@@ -643,12 +643,22 @@ private module CallExprBaseMatchingInput implements MatchingInputSig {
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private import codeql.rust.elements.internal.CallExprImpl::Impl as CallExprImpl
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class Access extends CallExprBase {
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abstract class Access extends Expr {
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abstract Type getTypeArgument(TypeArgumentPosition apos, TypePath path);
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abstract AstNode getNodeAt(AccessPosition apos);
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abstract Type getInferredType(AccessPosition apos, TypePath path);
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abstract Declaration getTarget();
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}
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private class CallExprBaseAccess extends Access instanceof CallExprBase {
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private TypeMention getMethodTypeArg(int i) {
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result = this.(MethodCallExpr).getGenericArgList().getTypeArg(i)
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}
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Type getTypeArgument(TypeArgumentPosition apos, TypePath path) {
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override Type getTypeArgument(TypeArgumentPosition apos, TypePath path) {
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exists(TypeMention arg | result = arg.resolveTypeAt(path) |
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arg = getExplicitTypeArgMention(CallExprImpl::getFunctionPath(this), apos.asTypeParam())
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or
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@@ -656,7 +666,7 @@ private module CallExprBaseMatchingInput implements MatchingInputSig {
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)
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}
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AstNode getNodeAt(AccessPosition apos) {
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override AstNode getNodeAt(AccessPosition apos) {
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exists(int p, boolean isMethodCall |
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argPos(this, result, p, isMethodCall) and
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apos = TPositionalAccessPosition(p, isMethodCall)
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@@ -669,17 +679,40 @@ private module CallExprBaseMatchingInput implements MatchingInputSig {
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apos = TReturnAccessPosition()
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}
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Type getInferredType(AccessPosition apos, TypePath path) {
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override Type getInferredType(AccessPosition apos, TypePath path) {
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result = inferType(this.getNodeAt(apos), path)
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}
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Declaration getTarget() {
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override Declaration getTarget() {
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result = CallExprImpl::getResolvedFunction(this)
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or
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result = inferMethodCallTarget(this) // mutual recursion; resolving method calls requires resolving types and vice versa
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}
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}
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private class OperationAccess extends Access instanceof Operation {
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override Type getTypeArgument(TypeArgumentPosition apos, TypePath path) {
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// The syntax for operators does not allow type arguments.
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none()
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}
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override AstNode getNodeAt(AccessPosition apos) {
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result = super.getOperand(0) and apos = TSelfAccessPosition()
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or
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result = super.getOperand(1) and apos = TPositionalAccessPosition(0, true)
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or
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result = this and apos = TReturnAccessPosition()
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}
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override Type getInferredType(AccessPosition apos, TypePath path) {
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result = inferType(this.getNodeAt(apos), path)
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}
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override Declaration getTarget() {
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result = inferMethodCallTarget(this) // mutual recursion; resolving method calls requires resolving types and vice versa
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}
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}
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predicate accessDeclarationPositionMatch(AccessPosition apos, DeclarationPosition dpos) {
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apos.isSelf() and
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dpos.isSelf()
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@@ -1059,6 +1092,26 @@ private module MethodCall {
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pragma[nomagic]
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override Type getTypeAt(TypePath path) { result = inferType(receiver, path) }
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}
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private class OperationMethodCall extends MethodCallImpl instanceof Operation {
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TraitItemNode trait;
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string methodName;
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OperationMethodCall() { super.isOverloaded(trait, methodName) }
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override string getMethodName() { result = methodName }
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override int getArity() { result = this.(Operation).getNumberOfOperands() - 1 }
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override Trait getTrait() { result = trait }
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pragma[nomagic]
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override Type getTypeAt(TypePath path) {
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result = inferType(this.(BinaryExpr).getLhs(), path)
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or
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result = inferType(this.(PrefixExpr).getExpr(), path)
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}
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}
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}
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import MethodCall
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@@ -770,7 +770,7 @@ mod method_supertraits {
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where
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Self: Sized,
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{
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if 3 > 2 { // $ MISSING: method=gt
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if 3 > 2 { // $ method=gt
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self.m1() // $ method=MyTrait1::m1
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} else {
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Self::m1(self)
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@@ -784,7 +784,7 @@ mod method_supertraits {
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where
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Self: Sized,
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{
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if 3 > 2 { // $ MISSING: method=gt
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if 3 > 2 { // $ method=gt
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self.m2().a // $ method=m2 $ fieldof=MyThing
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} else {
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Self::m2(self).a // $ fieldof=MyThing
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@@ -1027,7 +1027,7 @@ mod option_methods {
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println!("{:?}", MyOption::<MyOption<S>>::flatten(x6));
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#[rustfmt::skip]
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let from_if = if 3 > 2 { // $ MISSING: method=gt
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let from_if = if 3 > 2 { // $ method=gt
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MyOption::MyNone()
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} else {
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MyOption::MySome(S)
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@@ -1035,7 +1035,7 @@ mod option_methods {
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println!("{:?}", from_if);
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#[rustfmt::skip]
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let from_match = match 3 > 2 { // $ MISSING: method=gt
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let from_match = match 3 > 2 { // $ method=gt
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true => MyOption::MyNone(),
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false => MyOption::MySome(S),
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};
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@@ -1043,7 +1043,7 @@ mod option_methods {
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#[rustfmt::skip]
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let from_loop = loop {
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if 3 > 2 { // $ MISSING: method=gt
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if 3 > 2 { // $ method=gt
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break MyOption::MyNone();
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}
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break MyOption::MySome(S);
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@@ -1245,7 +1245,7 @@ mod builtins {
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pub fn f() {
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let x: i32 = 1; // $ type=x:i32
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let y = 2; // $ type=y:i32
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let z = x + y; // $ MISSING: type=z:i32 method=add
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let z = x + y; // $ type=z:i32 method=add
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let z = x.abs(); // $ method=abs $ type=z:i32
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let c = 'c'; // $ type=c:char
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let hello = "Hello"; // $ type=hello:str
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@@ -1262,7 +1262,7 @@ mod operators {
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let y = true || false; // $ type=y:bool
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let mut a;
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let cond = 34 == 33; // $ MISSING: method=eq
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let cond = 34 == 33; // $ method=eq
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if cond {
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let z = (a = 1); // $ type=z:() type=a:i32
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} else {
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@@ -1287,8 +1287,8 @@ mod overloadable_operators {
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// Vec2::add
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fn add(self, rhs: Self) -> Self {
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Vec2 {
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x: self.x + rhs.x, // $ fieldof=Vec2 MISSING: method=add
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y: self.y + rhs.y, // $ fieldof=Vec2 MISSING: method=add
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x: self.x + rhs.x, // $ fieldof=Vec2 method=add
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y: self.y + rhs.y, // $ fieldof=Vec2 method=add
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}
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}
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}
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@@ -1296,8 +1296,8 @@ mod overloadable_operators {
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// Vec2::add_assign
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#[rustfmt::skip]
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fn add_assign(&mut self, rhs: Self) {
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self.x += rhs.x; // $ fieldof=Vec2 MISSING: method=add_assign
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self.y += rhs.y; // $ fieldof=Vec2 MISSING: method=add_assign
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self.x += rhs.x; // $ fieldof=Vec2 method=add_assign
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self.y += rhs.y; // $ fieldof=Vec2 method=add_assign
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}
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}
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impl Sub for Vec2 {
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@@ -1305,8 +1305,8 @@ mod overloadable_operators {
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// Vec2::sub
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fn sub(self, rhs: Self) -> Self {
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Vec2 {
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x: self.x - rhs.x, // $ fieldof=Vec2 MISSING: method=sub
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y: self.y - rhs.y, // $ fieldof=Vec2 MISSING: method=sub
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x: self.x - rhs.x, // $ fieldof=Vec2 method=sub
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y: self.y - rhs.y, // $ fieldof=Vec2 method=sub
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}
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}
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}
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@@ -1314,8 +1314,8 @@ mod overloadable_operators {
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// Vec2::sub_assign
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#[rustfmt::skip]
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fn sub_assign(&mut self, rhs: Self) {
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self.x -= rhs.x; // $ fieldof=Vec2 MISSING: method=sub_assign
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self.y -= rhs.y; // $ fieldof=Vec2 MISSING: method=sub_assign
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self.x -= rhs.x; // $ fieldof=Vec2 method=sub_assign
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self.y -= rhs.y; // $ fieldof=Vec2 method=sub_assign
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}
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}
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impl Mul for Vec2 {
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@@ -1323,16 +1323,16 @@ mod overloadable_operators {
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// Vec2::mul
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fn mul(self, rhs: Self) -> Self {
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Vec2 {
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x: self.x * rhs.x, // $ fieldof=Vec2 MISSING: method=mul
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y: self.y * rhs.y, // $ fieldof=Vec2 MISSING: method=mul
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x: self.x * rhs.x, // $ fieldof=Vec2 method=mul
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y: self.y * rhs.y, // $ fieldof=Vec2 method=mul
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}
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}
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}
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impl MulAssign for Vec2 {
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// Vec2::mul_assign
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fn mul_assign(&mut self, rhs: Self) {
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self.x *= rhs.x; // $ fieldof=Vec2 MISSING: method=mul_assign
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self.y *= rhs.y; // $ fieldof=Vec2 MISSING: method=mul_assign
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self.x *= rhs.x; // $ fieldof=Vec2 method=mul_assign
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self.y *= rhs.y; // $ fieldof=Vec2 method=mul_assign
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}
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}
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impl Div for Vec2 {
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@@ -1340,16 +1340,16 @@ mod overloadable_operators {
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// Vec2::div
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fn div(self, rhs: Self) -> Self {
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Vec2 {
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x: self.x / rhs.x, // $ fieldof=Vec2 MISSING: method=div
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y: self.y / rhs.y, // $ fieldof=Vec2 MISSING: method=div
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x: self.x / rhs.x, // $ fieldof=Vec2 method=div
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y: self.y / rhs.y, // $ fieldof=Vec2 method=div
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}
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}
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}
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impl DivAssign for Vec2 {
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// Vec2::div_assign
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fn div_assign(&mut self, rhs: Self) {
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self.x /= rhs.x; // $ fieldof=Vec2 MISSING: method=div_assign
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self.y /= rhs.y; // $ fieldof=Vec2 MISSING: method=div_assign
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self.x /= rhs.x; // $ fieldof=Vec2 method=div_assign
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self.y /= rhs.y; // $ fieldof=Vec2 method=div_assign
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}
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}
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impl Rem for Vec2 {
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@@ -1357,16 +1357,16 @@ mod overloadable_operators {
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// Vec2::rem
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fn rem(self, rhs: Self) -> Self {
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Vec2 {
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x: self.x % rhs.x, // $ fieldof=Vec2 MISSING: method=rem
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y: self.y % rhs.y, // $ fieldof=Vec2 MISSING: method=rem
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x: self.x % rhs.x, // $ fieldof=Vec2 method=rem
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y: self.y % rhs.y, // $ fieldof=Vec2 method=rem
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}
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}
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}
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impl RemAssign for Vec2 {
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// Vec2::rem_assign
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fn rem_assign(&mut self, rhs: Self) {
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self.x %= rhs.x; // $ fieldof=Vec2 MISSING: method=rem_assign
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self.y %= rhs.y; // $ fieldof=Vec2 MISSING: method=rem_assign
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self.x %= rhs.x; // $ fieldof=Vec2 method=rem_assign
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self.y %= rhs.y; // $ fieldof=Vec2 method=rem_assign
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}
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}
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impl BitAnd for Vec2 {
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@@ -1374,16 +1374,16 @@ mod overloadable_operators {
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// Vec2::bitand
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fn bitand(self, rhs: Self) -> Self {
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Vec2 {
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x: self.x & rhs.x, // $ fieldof=Vec2 MISSING: method=bitand
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y: self.y & rhs.y, // $ fieldof=Vec2 MISSING: method=bitand
|
||||
x: self.x & rhs.x, // $ fieldof=Vec2 method=bitand
|
||||
y: self.y & rhs.y, // $ fieldof=Vec2 method=bitand
|
||||
}
|
||||
}
|
||||
}
|
||||
impl BitAndAssign for Vec2 {
|
||||
// Vec2::bitand_assign
|
||||
fn bitand_assign(&mut self, rhs: Self) {
|
||||
self.x &= rhs.x; // $ fieldof=Vec2 MISSING: method=bitand_assign
|
||||
self.y &= rhs.y; // $ fieldof=Vec2 MISSING: method=bitand_assign
|
||||
self.x &= rhs.x; // $ fieldof=Vec2 method=bitand_assign
|
||||
self.y &= rhs.y; // $ fieldof=Vec2 method=bitand_assign
|
||||
}
|
||||
}
|
||||
impl BitOr for Vec2 {
|
||||
@@ -1391,16 +1391,16 @@ mod overloadable_operators {
|
||||
// Vec2::bitor
|
||||
fn bitor(self, rhs: Self) -> Self {
|
||||
Vec2 {
|
||||
x: self.x | rhs.x, // $ fieldof=Vec2 MISSING: method=bitor
|
||||
y: self.y | rhs.y, // $ fieldof=Vec2 MISSING: method=bitor
|
||||
x: self.x | rhs.x, // $ fieldof=Vec2 method=bitor
|
||||
y: self.y | rhs.y, // $ fieldof=Vec2 method=bitor
|
||||
}
|
||||
}
|
||||
}
|
||||
impl BitOrAssign for Vec2 {
|
||||
// Vec2::bitor_assign
|
||||
fn bitor_assign(&mut self, rhs: Self) {
|
||||
self.x |= rhs.x; // $ fieldof=Vec2 MISSING: method=bitor_assign
|
||||
self.y |= rhs.y; // $ fieldof=Vec2 MISSING: method=bitor_assign
|
||||
self.x |= rhs.x; // $ fieldof=Vec2 method=bitor_assign
|
||||
self.y |= rhs.y; // $ fieldof=Vec2 method=bitor_assign
|
||||
}
|
||||
}
|
||||
impl BitXor for Vec2 {
|
||||
@@ -1408,16 +1408,16 @@ mod overloadable_operators {
|
||||
// Vec2::bitxor
|
||||
fn bitxor(self, rhs: Self) -> Self {
|
||||
Vec2 {
|
||||
x: self.x ^ rhs.x, // $ fieldof=Vec2 MISSING: method=bitxor
|
||||
y: self.y ^ rhs.y, // $ fieldof=Vec2 MISSING: method=bitxor
|
||||
x: self.x ^ rhs.x, // $ fieldof=Vec2 method=bitxor
|
||||
y: self.y ^ rhs.y, // $ fieldof=Vec2 method=bitxor
|
||||
}
|
||||
}
|
||||
}
|
||||
impl BitXorAssign for Vec2 {
|
||||
// Vec2::bitxor_assign
|
||||
fn bitxor_assign(&mut self, rhs: Self) {
|
||||
self.x ^= rhs.x; // $ fieldof=Vec2 MISSING: method=bitxor_assign
|
||||
self.y ^= rhs.y; // $ fieldof=Vec2 MISSING: method=bitxor_assign
|
||||
self.x ^= rhs.x; // $ fieldof=Vec2 method=bitxor_assign
|
||||
self.y ^= rhs.y; // $ fieldof=Vec2 method=bitxor_assign
|
||||
}
|
||||
}
|
||||
impl Shl<u32> for Vec2 {
|
||||
@@ -1425,16 +1425,16 @@ mod overloadable_operators {
|
||||
// Vec2::shl
|
||||
fn shl(self, rhs: u32) -> Self {
|
||||
Vec2 {
|
||||
x: self.x << rhs, // $ fieldof=Vec2 MISSING: method=shl
|
||||
y: self.y << rhs, // $ fieldof=Vec2 MISSING: method=shl
|
||||
x: self.x << rhs, // $ fieldof=Vec2 method=shl
|
||||
y: self.y << rhs, // $ fieldof=Vec2 method=shl
|
||||
}
|
||||
}
|
||||
}
|
||||
impl ShlAssign<u32> for Vec2 {
|
||||
// Vec2::shl_assign
|
||||
fn shl_assign(&mut self, rhs: u32) {
|
||||
self.x <<= rhs; // $ fieldof=Vec2 MISSING: method=shl_assign
|
||||
self.y <<= rhs; // $ fieldof=Vec2 MISSING: method=shl_assign
|
||||
self.x <<= rhs; // $ fieldof=Vec2 method=shl_assign
|
||||
self.y <<= rhs; // $ fieldof=Vec2 method=shl_assign
|
||||
}
|
||||
}
|
||||
impl Shr<u32> for Vec2 {
|
||||
@@ -1442,16 +1442,16 @@ mod overloadable_operators {
|
||||
// Vec2::shr
|
||||
fn shr(self, rhs: u32) -> Self {
|
||||
Vec2 {
|
||||
x: self.x >> rhs, // $ fieldof=Vec2 MISSING: method=shr
|
||||
y: self.y >> rhs, // $ fieldof=Vec2 MISSING: method=shr
|
||||
x: self.x >> rhs, // $ fieldof=Vec2 method=shr
|
||||
y: self.y >> rhs, // $ fieldof=Vec2 method=shr
|
||||
}
|
||||
}
|
||||
}
|
||||
impl ShrAssign<u32> for Vec2 {
|
||||
// Vec2::shr_assign
|
||||
fn shr_assign(&mut self, rhs: u32) {
|
||||
self.x >>= rhs; // $ fieldof=Vec2 MISSING: method=shr_assign
|
||||
self.y >>= rhs; // $ fieldof=Vec2 MISSING: method=shr_assign
|
||||
self.x >>= rhs; // $ fieldof=Vec2 method=shr_assign
|
||||
self.y >>= rhs; // $ fieldof=Vec2 method=shr_assign
|
||||
}
|
||||
}
|
||||
impl Neg for Vec2 {
|
||||
@@ -1459,8 +1459,8 @@ mod overloadable_operators {
|
||||
// Vec2::neg
|
||||
fn neg(self) -> Self {
|
||||
Vec2 {
|
||||
x: -self.x, // $ fieldof=Vec2 MISSING: method=neg
|
||||
y: -self.y, // $ fieldof=Vec2 MISSING: method=neg
|
||||
x: -self.x, // $ fieldof=Vec2 method=neg
|
||||
y: -self.y, // $ fieldof=Vec2 method=neg
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1469,164 +1469,164 @@ mod overloadable_operators {
|
||||
// Vec2::not
|
||||
fn not(self) -> Self {
|
||||
Vec2 {
|
||||
x: !self.x, // $ fieldof=Vec2 MISSING: method=not
|
||||
y: !self.y, // $ fieldof=Vec2 MISSING: method=not
|
||||
x: !self.x, // $ fieldof=Vec2 method=not
|
||||
y: !self.y, // $ fieldof=Vec2 method=not
|
||||
}
|
||||
}
|
||||
}
|
||||
impl PartialEq for Vec2 {
|
||||
// Vec2::eq
|
||||
fn eq(&self, other: &Self) -> bool {
|
||||
self.x == other.x && self.y == other.y // $ fieldof=Vec2 fieldof=Vec2 MISSING: method=eq
|
||||
self.x == other.x && self.y == other.y // $ fieldof=Vec2 method=eq
|
||||
}
|
||||
// Vec2::ne
|
||||
fn ne(&self, other: &Self) -> bool {
|
||||
self.x != other.x || self.y != other.y // $ fieldof=Vec2 fieldof=Vec2 MISSING: method=ne
|
||||
self.x != other.x || self.y != other.y // $ fieldof=Vec2 method=ne
|
||||
}
|
||||
}
|
||||
impl PartialOrd for Vec2 {
|
||||
// Vec2::partial_cmp
|
||||
fn partial_cmp(&self, other: &Self) -> Option<std::cmp::Ordering> {
|
||||
(self.x + self.y).partial_cmp(&(other.x + other.y)) // $ fieldof=Vec2 fieldof=Vec2 MISSING: method=partial_cmp method=add
|
||||
(self.x + self.y).partial_cmp(&(other.x + other.y)) // $ fieldof=Vec2 method=partial_cmp method=add
|
||||
}
|
||||
// Vec2::lt
|
||||
fn lt(&self, other: &Self) -> bool {
|
||||
self.x < other.x && self.y < other.y // $ fieldof=Vec2 fieldof=Vec2 MISSING: method=lt
|
||||
self.x < other.x && self.y < other.y // $ fieldof=Vec2 method=lt
|
||||
}
|
||||
// Vec2::le
|
||||
fn le(&self, other: &Self) -> bool {
|
||||
self.x <= other.x && self.y <= other.y // $ fieldof=Vec2 fieldof=Vec2 MISSING: method=le
|
||||
self.x <= other.x && self.y <= other.y // $ fieldof=Vec2 method=le
|
||||
}
|
||||
// Vec2::gt
|
||||
fn gt(&self, other: &Self) -> bool {
|
||||
self.x > other.x && self.y > other.y // $ fieldof=Vec2 fieldof=Vec2 MISSING: method=gt
|
||||
self.x > other.x && self.y > other.y // $ fieldof=Vec2 method=gt
|
||||
}
|
||||
// Vec2::ge
|
||||
fn ge(&self, other: &Self) -> bool {
|
||||
self.x >= other.x && self.y >= other.y // $ fieldof=Vec2 fieldof=Vec2 MISSING: method=ge
|
||||
self.x >= other.x && self.y >= other.y // $ fieldof=Vec2 method=ge
|
||||
}
|
||||
}
|
||||
pub fn f() {
|
||||
// Test for all overloadable operators on `i64`
|
||||
|
||||
// Comparison operators
|
||||
let i64_eq = (1i64 == 2i64); // $ MISSING: type=i64_eq:bool method=eq
|
||||
let i64_ne = (3i64 != 4i64); // $ MISSING: type=i64_ne:bool method=ne
|
||||
let i64_lt = (5i64 < 6i64); // $ MISSING: type=i64_lt:bool method=lt
|
||||
let i64_le = (7i64 <= 8i64); // $ MISSING: type=i64_le:bool method=le
|
||||
let i64_gt = (9i64 > 10i64); // $ MISSING: type=i64_gt:bool method=gt
|
||||
let i64_ge = (11i64 >= 12i64); // $ MISSING: type=i64_ge:bool method=ge
|
||||
let i64_eq = (1i64 == 2i64); // $ type=i64_eq:bool method=eq
|
||||
let i64_ne = (3i64 != 4i64); // $ type=i64_ne:bool method=ne
|
||||
let i64_lt = (5i64 < 6i64); // $ type=i64_lt:bool method=lt
|
||||
let i64_le = (7i64 <= 8i64); // $ type=i64_le:bool method=le
|
||||
let i64_gt = (9i64 > 10i64); // $ type=i64_gt:bool method=gt
|
||||
let i64_ge = (11i64 >= 12i64); // $ type=i64_ge:bool method=ge
|
||||
|
||||
// Arithmetic operators
|
||||
let i64_add = 13i64 + 14i64; // $ MISSING: type=i64_add:i64 method=add
|
||||
let i64_sub = 15i64 - 16i64; // $ MISSING: type=i64_sub:i64 method=sub
|
||||
let i64_mul = 17i64 * 18i64; // $ MISSING: type=i64_mul:i64 method=mul
|
||||
let i64_div = 19i64 / 20i64; // $ MISSING: type=i64_div:i64 method=div
|
||||
let i64_rem = 21i64 % 22i64; // $ MISSING: type=i64_rem:i64 method=rem
|
||||
let i64_add = 13i64 + 14i64; // $ type=i64_add:i64 method=add
|
||||
let i64_sub = 15i64 - 16i64; // $ type=i64_sub:i64 method=sub
|
||||
let i64_mul = 17i64 * 18i64; // $ type=i64_mul:i64 method=mul
|
||||
let i64_div = 19i64 / 20i64; // $ type=i64_div:i64 method=div
|
||||
let i64_rem = 21i64 % 22i64; // $ type=i64_rem:i64 method=rem
|
||||
|
||||
// Arithmetic assignment operators
|
||||
let mut i64_add_assign = 23i64;
|
||||
i64_add_assign += 24i64; // $ MISSING: method=add_assign
|
||||
i64_add_assign += 24i64; // $ method=add_assign
|
||||
|
||||
let mut i64_sub_assign = 25i64;
|
||||
i64_sub_assign -= 26i64; // $ MISSING: method=sub_assign
|
||||
i64_sub_assign -= 26i64; // $ method=sub_assign
|
||||
|
||||
let mut i64_mul_assign = 27i64;
|
||||
i64_mul_assign *= 28i64; // $ MISSING: method=mul_assign
|
||||
i64_mul_assign *= 28i64; // $ method=mul_assign
|
||||
|
||||
let mut i64_div_assign = 29i64;
|
||||
i64_div_assign /= 30i64; // $ MISSING: method=div_assign
|
||||
i64_div_assign /= 30i64; // $ method=div_assign
|
||||
|
||||
let mut i64_rem_assign = 31i64;
|
||||
i64_rem_assign %= 32i64; // $ MISSING: method=rem_assign
|
||||
i64_rem_assign %= 32i64; // $ method=rem_assign
|
||||
|
||||
// Bitwise operators
|
||||
let i64_bitand = 33i64 & 34i64; // $ MISSING: type=i64_bitand:i64 method=bitand
|
||||
let i64_bitor = 35i64 | 36i64; // $ MISSING: type=i64_bitor:i64 method=bitor
|
||||
let i64_bitxor = 37i64 ^ 38i64; // $ MISSING: type=i64_bitxor:i64 method=bitxor
|
||||
let i64_shl = 39i64 << 40i64; // $ MISSING: type=i64_shl:i64 method=shl
|
||||
let i64_shr = 41i64 >> 42i64; // $ MISSING: type=i64_shr:i64 method=shr
|
||||
let i64_bitand = 33i64 & 34i64; // $ type=i64_bitand:i64 method=bitand
|
||||
let i64_bitor = 35i64 | 36i64; // $ type=i64_bitor:i64 method=bitor
|
||||
let i64_bitxor = 37i64 ^ 38i64; // $ type=i64_bitxor:i64 method=bitxor
|
||||
let i64_shl = 39i64 << 40i64; // $ type=i64_shl:i64 method=shl
|
||||
let i64_shr = 41i64 >> 42i64; // $ type=i64_shr:i64 method=shr
|
||||
|
||||
// Bitwise assignment operators
|
||||
let mut i64_bitand_assign = 43i64;
|
||||
i64_bitand_assign &= 44i64; // $ MISSING: method=bitand_assign
|
||||
i64_bitand_assign &= 44i64; // $ method=bitand_assign
|
||||
|
||||
let mut i64_bitor_assign = 45i64;
|
||||
i64_bitor_assign |= 46i64; // $ MISSING: method=bitor_assign
|
||||
i64_bitor_assign |= 46i64; // $ method=bitor_assign
|
||||
|
||||
let mut i64_bitxor_assign = 47i64;
|
||||
i64_bitxor_assign ^= 48i64; // $ MISSING: method=bitxor_assign
|
||||
i64_bitxor_assign ^= 48i64; // $ method=bitxor_assign
|
||||
|
||||
let mut i64_shl_assign = 49i64;
|
||||
i64_shl_assign <<= 50i64; // $ MISSING: method=shl_assign
|
||||
i64_shl_assign <<= 50i64; // $ method=shl_assign
|
||||
|
||||
let mut i64_shr_assign = 51i64;
|
||||
i64_shr_assign >>= 52i64; // $ MISSING: method=shr_assign
|
||||
i64_shr_assign >>= 52i64; // $ method=shr_assign
|
||||
|
||||
let i64_neg = -53i64; // $ MISSING: type=i64_neg:i64 method=neg
|
||||
let i64_not = !54i64; // $ MISSING: type=i64_not:i64 method=not
|
||||
let i64_neg = -53i64; // $ type=i64_neg:i64 method=neg
|
||||
let i64_not = !54i64; // $ type=i64_not:i64 method=not
|
||||
|
||||
// Test for all overloadable operators on Vec2
|
||||
let v1 = Vec2 { x: 1, y: 2 };
|
||||
let v2 = Vec2 { x: 3, y: 4 };
|
||||
|
||||
// Comparison operators
|
||||
let vec2_eq = v1 == v2; // $ MISSING: type=vec2_eq:bool method=Vec2::eq
|
||||
let vec2_ne = v1 != v2; // $ MISSING: type=vec2_ne:bool method=Vec2::ne
|
||||
let vec2_lt = v1 < v2; // $ MISSING: type=vec2_lt:bool method=Vec2::lt
|
||||
let vec2_le = v1 <= v2; // $ MISSING: type=vec2_le:bool method=Vec2::le
|
||||
let vec2_gt = v1 > v2; // $ MISSING: type=vec2_gt:bool method=Vec2::gt
|
||||
let vec2_ge = v1 >= v2; // $ MISSING: type=vec2_ge:bool method=Vec2::ge
|
||||
let vec2_eq = v1 == v2; // $ type=vec2_eq:bool method=Vec2::eq
|
||||
let vec2_ne = v1 != v2; // $ type=vec2_ne:bool method=Vec2::ne
|
||||
let vec2_lt = v1 < v2; // $ type=vec2_lt:bool method=Vec2::lt
|
||||
let vec2_le = v1 <= v2; // $ type=vec2_le:bool method=Vec2::le
|
||||
let vec2_gt = v1 > v2; // $ type=vec2_gt:bool method=Vec2::gt
|
||||
let vec2_ge = v1 >= v2; // $ type=vec2_ge:bool method=Vec2::ge
|
||||
|
||||
// Arithmetic operators
|
||||
let vec2_add = v1 + v2; // $ MISSING: type=vec2_add:Vec2 method=Vec2::add
|
||||
let vec2_sub = v1 - v2; // $ MISSING: type=vec2_sub:Vec2 method=Vec2::sub
|
||||
let vec2_mul = v1 * v2; // $ MISSING: type=vec2_mul:Vec2 method=Vec2::mul
|
||||
let vec2_div = v1 / v2; // $ MISSING: type=vec2_div:Vec2 method=Vec2::div
|
||||
let vec2_rem = v1 % v2; // $ MISSING: type=vec2_rem:Vec2 method=Vec2::rem
|
||||
let vec2_add = v1 + v2; // $ type=vec2_add:Vec2 method=Vec2::add
|
||||
let vec2_sub = v1 - v2; // $ type=vec2_sub:Vec2 method=Vec2::sub
|
||||
let vec2_mul = v1 * v2; // $ type=vec2_mul:Vec2 method=Vec2::mul
|
||||
let vec2_div = v1 / v2; // $ type=vec2_div:Vec2 method=Vec2::div
|
||||
let vec2_rem = v1 % v2; // $ type=vec2_rem:Vec2 method=Vec2::rem
|
||||
|
||||
// Arithmetic assignment operators
|
||||
let mut vec2_add_assign = v1;
|
||||
vec2_add_assign += v2; // $ MISSING: method=Vec2::add_assign
|
||||
vec2_add_assign += v2; // $ method=Vec2::add_assign
|
||||
|
||||
let mut vec2_sub_assign = v1;
|
||||
vec2_sub_assign -= v2; // $ MISSING: method=Vec2::sub_assign
|
||||
vec2_sub_assign -= v2; // $ method=Vec2::sub_assign
|
||||
|
||||
let mut vec2_mul_assign = v1;
|
||||
vec2_mul_assign *= v2; // $ MISSING: method=Vec2::mul_assign
|
||||
vec2_mul_assign *= v2; // $ method=Vec2::mul_assign
|
||||
|
||||
let mut vec2_div_assign = v1;
|
||||
vec2_div_assign /= v2; // $ MISSING: method=Vec2::div_assign
|
||||
vec2_div_assign /= v2; // $ method=Vec2::div_assign
|
||||
|
||||
let mut vec2_rem_assign = v1;
|
||||
vec2_rem_assign %= v2; // $ MISSING: method=Vec2::rem_assign
|
||||
vec2_rem_assign %= v2; // $ method=Vec2::rem_assign
|
||||
|
||||
// Bitwise operators
|
||||
let vec2_bitand = v1 & v2; // $ MISSING: type=vec2_bitand:Vec2 method=Vec2::bitand
|
||||
let vec2_bitor = v1 | v2; // $ MISSING: type=vec2_bitor:Vec2 method=Vec2::bitor
|
||||
let vec2_bitxor = v1 ^ v2; // $ MISSING: type=vec2_bitxor:Vec2 method=Vec2::bitxor
|
||||
let vec2_shl = v1 << 1u32; // $ MISSING: type=vec2_shl:Vec2 method=Vec2::shl
|
||||
let vec2_shr = v1 >> 1u32; // $ MISSING: type=vec2_shr:Vec2 method=Vec2::shr
|
||||
let vec2_bitand = v1 & v2; // $ type=vec2_bitand:Vec2 method=Vec2::bitand
|
||||
let vec2_bitor = v1 | v2; // $ type=vec2_bitor:Vec2 method=Vec2::bitor
|
||||
let vec2_bitxor = v1 ^ v2; // $ type=vec2_bitxor:Vec2 method=Vec2::bitxor
|
||||
let vec2_shl = v1 << 1u32; // $ type=vec2_shl:Vec2 method=Vec2::shl
|
||||
let vec2_shr = v1 >> 1u32; // $ type=vec2_shr:Vec2 method=Vec2::shr
|
||||
|
||||
// Bitwise assignment operators
|
||||
let mut vec2_bitand_assign = v1;
|
||||
vec2_bitand_assign &= v2; // $ MISSING: method=Vec2::bitand_assign
|
||||
vec2_bitand_assign &= v2; // $ method=Vec2::bitand_assign
|
||||
|
||||
let mut vec2_bitor_assign = v1;
|
||||
vec2_bitor_assign |= v2; // $ MISSING: method=Vec2::bitor_assign
|
||||
vec2_bitor_assign |= v2; // $ method=Vec2::bitor_assign
|
||||
|
||||
let mut vec2_bitxor_assign = v1;
|
||||
vec2_bitxor_assign ^= v2; // $ MISSING: method=Vec2::bitxor_assign
|
||||
vec2_bitxor_assign ^= v2; // $ method=Vec2::bitxor_assign
|
||||
|
||||
let mut vec2_shl_assign = v1;
|
||||
vec2_shl_assign <<= 1u32; // $ MISSING: method=Vec2::shl_assign
|
||||
vec2_shl_assign <<= 1u32; // $ method=Vec2::shl_assign
|
||||
|
||||
let mut vec2_shr_assign = v1;
|
||||
vec2_shr_assign >>= 1u32; // $ MISSING: method=Vec2::shr_assign
|
||||
vec2_shr_assign >>= 1u32; // $ method=Vec2::shr_assign
|
||||
|
||||
// Prefix operators
|
||||
let vec2_neg = -v1; // $ MISSING: type=vec2_neg:Vec2 method=Vec2::neg
|
||||
let vec2_not = !v1; // $ MISSING: type=vec2_not:Vec2 method=Vec2::not
|
||||
let vec2_neg = -v1; // $ type=vec2_neg:Vec2 method=Vec2::neg
|
||||
let vec2_not = !v1; // $ type=vec2_not:Vec2 method=Vec2::not
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -837,6 +837,7 @@ inferType
|
||||
| main.rs:772:9:778:9 | { ... } | | main.rs:767:20:767:22 | Tr2 |
|
||||
| main.rs:773:13:777:13 | if ... {...} else {...} | | main.rs:767:20:767:22 | Tr2 |
|
||||
| main.rs:773:16:773:16 | 3 | | file:///BUILTINS/types.rs:12:1:12:15 | i32 |
|
||||
| main.rs:773:16:773:20 | ... > ... | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:773:20:773:20 | 2 | | file:///BUILTINS/types.rs:12:1:12:15 | i32 |
|
||||
| main.rs:773:22:775:13 | { ... } | | main.rs:767:20:767:22 | Tr2 |
|
||||
| main.rs:774:17:774:20 | self | | main.rs:767:5:779:5 | Self [trait MyTrait2] |
|
||||
@@ -848,6 +849,7 @@ inferType
|
||||
| main.rs:786:9:792:9 | { ... } | | main.rs:781:20:781:22 | Tr3 |
|
||||
| main.rs:787:13:791:13 | if ... {...} else {...} | | main.rs:781:20:781:22 | Tr3 |
|
||||
| main.rs:787:16:787:16 | 3 | | file:///BUILTINS/types.rs:12:1:12:15 | i32 |
|
||||
| main.rs:787:16:787:20 | ... > ... | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:787:20:787:20 | 2 | | file:///BUILTINS/types.rs:12:1:12:15 | i32 |
|
||||
| main.rs:787:22:789:13 | { ... } | | main.rs:781:20:781:22 | Tr3 |
|
||||
| main.rs:788:17:788:20 | self | | main.rs:781:5:793:5 | Self [trait MyTrait3] |
|
||||
@@ -1191,6 +1193,7 @@ inferType
|
||||
| main.rs:1030:23:1034:9 | if ... {...} else {...} | | main.rs:969:5:973:5 | MyOption |
|
||||
| main.rs:1030:23:1034:9 | if ... {...} else {...} | T | main.rs:1004:5:1005:13 | S |
|
||||
| main.rs:1030:26:1030:26 | 3 | | file:///BUILTINS/types.rs:12:1:12:15 | i32 |
|
||||
| main.rs:1030:26:1030:30 | ... > ... | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1030:30:1030:30 | 2 | | file:///BUILTINS/types.rs:12:1:12:15 | i32 |
|
||||
| main.rs:1030:32:1032:9 | { ... } | | main.rs:969:5:973:5 | MyOption |
|
||||
| main.rs:1030:32:1032:9 | { ... } | T | main.rs:1004:5:1005:13 | S |
|
||||
@@ -1209,6 +1212,7 @@ inferType
|
||||
| main.rs:1038:26:1041:9 | match ... { ... } | | main.rs:969:5:973:5 | MyOption |
|
||||
| main.rs:1038:26:1041:9 | match ... { ... } | T | main.rs:1004:5:1005:13 | S |
|
||||
| main.rs:1038:32:1038:32 | 3 | | file:///BUILTINS/types.rs:12:1:12:15 | i32 |
|
||||
| main.rs:1038:32:1038:36 | ... > ... | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1038:36:1038:36 | 2 | | file:///BUILTINS/types.rs:12:1:12:15 | i32 |
|
||||
| main.rs:1039:13:1039:16 | true | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1039:21:1039:38 | ...::MyNone(...) | | main.rs:969:5:973:5 | MyOption |
|
||||
@@ -1225,6 +1229,7 @@ inferType
|
||||
| main.rs:1045:25:1050:9 | loop { ... } | | main.rs:969:5:973:5 | MyOption |
|
||||
| main.rs:1045:25:1050:9 | loop { ... } | T | main.rs:1004:5:1005:13 | S |
|
||||
| main.rs:1046:16:1046:16 | 3 | | file:///BUILTINS/types.rs:12:1:12:15 | i32 |
|
||||
| main.rs:1046:16:1046:20 | ... > ... | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1046:20:1046:20 | 2 | | file:///BUILTINS/types.rs:12:1:12:15 | i32 |
|
||||
| main.rs:1047:23:1047:40 | ...::MyNone(...) | | main.rs:969:5:973:5 | MyOption |
|
||||
| main.rs:1047:23:1047:40 | ...::MyNone(...) | T | main.rs:1004:5:1005:13 | S |
|
||||
@@ -1578,7 +1583,9 @@ inferType
|
||||
| main.rs:1246:22:1246:22 | 1 | | file:///BUILTINS/types.rs:12:1:12:15 | i32 |
|
||||
| main.rs:1247:13:1247:13 | y | | file:///BUILTINS/types.rs:12:1:12:15 | i32 |
|
||||
| main.rs:1247:17:1247:17 | 2 | | file:///BUILTINS/types.rs:12:1:12:15 | i32 |
|
||||
| main.rs:1248:13:1248:13 | z | | file:///BUILTINS/types.rs:12:1:12:15 | i32 |
|
||||
| main.rs:1248:17:1248:17 | x | | file:///BUILTINS/types.rs:12:1:12:15 | i32 |
|
||||
| main.rs:1248:17:1248:21 | ... + ... | | file:///BUILTINS/types.rs:12:1:12:15 | i32 |
|
||||
| main.rs:1248:21:1248:21 | y | | file:///BUILTINS/types.rs:12:1:12:15 | i32 |
|
||||
| main.rs:1249:13:1249:13 | z | | file:///BUILTINS/types.rs:12:1:12:15 | i32 |
|
||||
| main.rs:1249:17:1249:17 | x | | file:///BUILTINS/types.rs:12:1:12:15 | i32 |
|
||||
@@ -1602,8 +1609,11 @@ inferType
|
||||
| main.rs:1262:17:1262:29 | ... \|\| ... | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1262:25:1262:29 | false | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1264:13:1264:17 | mut a | | file:///BUILTINS/types.rs:12:1:12:15 | i32 |
|
||||
| main.rs:1265:13:1265:16 | cond | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1265:20:1265:21 | 34 | | file:///BUILTINS/types.rs:12:1:12:15 | i32 |
|
||||
| main.rs:1265:20:1265:27 | ... == ... | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1265:26:1265:27 | 33 | | file:///BUILTINS/types.rs:12:1:12:15 | i32 |
|
||||
| main.rs:1266:12:1266:15 | cond | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1267:17:1267:17 | z | | file://:0:0:0:0 | () |
|
||||
| main.rs:1267:21:1267:27 | (...) | | file://:0:0:0:0 | () |
|
||||
| main.rs:1267:22:1267:22 | a | | file:///BUILTINS/types.rs:12:1:12:15 | i32 |
|
||||
@@ -1959,18 +1969,23 @@ inferType
|
||||
| main.rs:1489:31:1489:35 | other | &T | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1489:75:1491:9 | { ... } | | file:///RUSTUP_HOME/toolchain/lib/rustlib/src/rust/library/core/src/option.rs:565:1:581:1 | Option |
|
||||
| main.rs:1489:75:1491:9 | { ... } | T | file:///RUSTUP_HOME/toolchain/lib/rustlib/src/rust/library/core/src/cmp.rs:367:1:397:1 | Ordering |
|
||||
| main.rs:1490:13:1490:29 | (...) | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1490:13:1490:63 | ... .partial_cmp(...) | | file:///RUSTUP_HOME/toolchain/lib/rustlib/src/rust/library/core/src/option.rs:565:1:581:1 | Option |
|
||||
| main.rs:1490:13:1490:63 | ... .partial_cmp(...) | T | file:///RUSTUP_HOME/toolchain/lib/rustlib/src/rust/library/core/src/cmp.rs:367:1:397:1 | Ordering |
|
||||
| main.rs:1490:14:1490:17 | self | | file://:0:0:0:0 | & |
|
||||
| main.rs:1490:14:1490:17 | self | &T | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1490:14:1490:19 | self.x | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1490:14:1490:28 | ... + ... | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1490:23:1490:26 | self | | file://:0:0:0:0 | & |
|
||||
| main.rs:1490:23:1490:26 | self | &T | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1490:23:1490:28 | self.y | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1490:43:1490:62 | &... | | file://:0:0:0:0 | & |
|
||||
| main.rs:1490:43:1490:62 | &... | &T | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1490:44:1490:62 | (...) | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1490:45:1490:49 | other | | file://:0:0:0:0 | & |
|
||||
| main.rs:1490:45:1490:49 | other | &T | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1490:45:1490:51 | other.x | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1490:45:1490:61 | ... + ... | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1490:55:1490:59 | other | | file://:0:0:0:0 | & |
|
||||
| main.rs:1490:55:1490:59 | other | &T | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1490:55:1490:61 | other.y | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
@@ -2054,27 +2069,55 @@ inferType
|
||||
| main.rs:1506:44:1506:48 | other | | file://:0:0:0:0 | & |
|
||||
| main.rs:1506:44:1506:48 | other | &T | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1506:44:1506:50 | other.y | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1513:13:1513:18 | i64_eq | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1513:22:1513:35 | (...) | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1513:23:1513:26 | 1i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1513:23:1513:34 | ... == ... | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1513:31:1513:34 | 2i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1514:13:1514:18 | i64_ne | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1514:22:1514:35 | (...) | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1514:23:1514:26 | 3i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1514:23:1514:34 | ... != ... | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1514:31:1514:34 | 4i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1515:13:1515:18 | i64_lt | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1515:22:1515:34 | (...) | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1515:23:1515:26 | 5i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1515:23:1515:33 | ... < ... | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1515:30:1515:33 | 6i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1516:13:1516:18 | i64_le | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1516:22:1516:35 | (...) | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1516:23:1516:26 | 7i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1516:23:1516:34 | ... <= ... | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1516:31:1516:34 | 8i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1517:13:1517:18 | i64_gt | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1517:22:1517:35 | (...) | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1517:23:1517:26 | 9i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1517:23:1517:34 | ... > ... | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1517:30:1517:34 | 10i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1518:13:1518:18 | i64_ge | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1518:22:1518:37 | (...) | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1518:23:1518:27 | 11i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1518:23:1518:36 | ... >= ... | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1518:32:1518:36 | 12i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1521:13:1521:19 | i64_add | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1521:23:1521:27 | 13i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1521:23:1521:35 | ... + ... | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1521:31:1521:35 | 14i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1522:13:1522:19 | i64_sub | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1522:23:1522:27 | 15i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1522:23:1522:35 | ... - ... | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1522:31:1522:35 | 16i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1523:13:1523:19 | i64_mul | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1523:23:1523:27 | 17i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1523:23:1523:35 | ... * ... | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1523:31:1523:35 | 18i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1524:13:1524:19 | i64_div | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1524:23:1524:27 | 19i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1524:23:1524:35 | ... / ... | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1524:31:1524:35 | 20i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1525:13:1525:19 | i64_rem | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1525:23:1525:27 | 21i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1525:23:1525:35 | ... % ... | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1525:31:1525:35 | 22i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1528:13:1528:30 | mut i64_add_assign | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1528:34:1528:38 | 23i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
@@ -2101,15 +2144,25 @@ inferType
|
||||
| main.rs:1541:9:1541:22 | i64_rem_assign | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1541:9:1541:31 | ... %= ... | | file://:0:0:0:0 | () |
|
||||
| main.rs:1541:27:1541:31 | 32i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1544:13:1544:22 | i64_bitand | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1544:26:1544:30 | 33i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1544:26:1544:38 | ... & ... | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1544:34:1544:38 | 34i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1545:13:1545:21 | i64_bitor | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1545:25:1545:29 | 35i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1545:25:1545:37 | ... \| ... | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1545:33:1545:37 | 36i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1546:13:1546:22 | i64_bitxor | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1546:26:1546:30 | 37i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1546:26:1546:38 | ... ^ ... | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1546:34:1546:38 | 38i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1547:13:1547:19 | i64_shl | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1547:23:1547:27 | 39i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1547:23:1547:36 | ... << ... | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1547:32:1547:36 | 40i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1548:13:1548:19 | i64_shr | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1548:23:1548:27 | 41i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1548:23:1548:36 | ... >> ... | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1548:32:1548:36 | 42i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1551:13:1551:33 | mut i64_bitand_assign | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1551:37:1551:41 | 43i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
@@ -2136,7 +2189,11 @@ inferType
|
||||
| main.rs:1564:9:1564:22 | i64_shr_assign | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1564:9:1564:32 | ... >>= ... | | file://:0:0:0:0 | () |
|
||||
| main.rs:1564:28:1564:32 | 52i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1566:13:1566:19 | i64_neg | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1566:23:1566:28 | - ... | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1566:24:1566:28 | 53i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1567:13:1567:19 | i64_not | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1567:23:1567:28 | ! ... | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1567:24:1567:28 | 54i64 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1570:13:1570:14 | v1 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1570:18:1570:36 | Vec2 {...} | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
@@ -2144,84 +2201,164 @@ inferType
|
||||
| main.rs:1570:28:1570:28 | 1 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1570:34:1570:34 | 2 | | file:///BUILTINS/types.rs:12:1:12:15 | i32 |
|
||||
| main.rs:1570:34:1570:34 | 2 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1571:13:1571:14 | v2 | | file://:0:0:0:0 | & |
|
||||
| main.rs:1571:13:1571:14 | v2 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1571:13:1571:14 | v2 | &T | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1571:18:1571:36 | Vec2 {...} | | file://:0:0:0:0 | & |
|
||||
| main.rs:1571:18:1571:36 | Vec2 {...} | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1571:18:1571:36 | Vec2 {...} | &T | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1571:28:1571:28 | 3 | | file:///BUILTINS/types.rs:12:1:12:15 | i32 |
|
||||
| main.rs:1571:28:1571:28 | 3 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1571:34:1571:34 | 4 | | file:///BUILTINS/types.rs:12:1:12:15 | i32 |
|
||||
| main.rs:1571:34:1571:34 | 4 | | file:///BUILTINS/types.rs:13:1:13:15 | i64 |
|
||||
| main.rs:1574:13:1574:19 | vec2_eq | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1574:23:1574:24 | v1 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1574:23:1574:30 | ... == ... | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1574:29:1574:30 | v2 | | file://:0:0:0:0 | & |
|
||||
| main.rs:1574:29:1574:30 | v2 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1574:29:1574:30 | v2 | &T | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1575:13:1575:19 | vec2_ne | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1575:23:1575:24 | v1 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1575:23:1575:30 | ... != ... | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1575:29:1575:30 | v2 | | file://:0:0:0:0 | & |
|
||||
| main.rs:1575:29:1575:30 | v2 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1575:29:1575:30 | v2 | &T | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1576:13:1576:19 | vec2_lt | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1576:23:1576:24 | v1 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1576:23:1576:29 | ... < ... | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1576:28:1576:29 | v2 | | file://:0:0:0:0 | & |
|
||||
| main.rs:1576:28:1576:29 | v2 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1576:28:1576:29 | v2 | &T | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1577:13:1577:19 | vec2_le | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1577:23:1577:24 | v1 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1577:23:1577:30 | ... <= ... | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1577:29:1577:30 | v2 | | file://:0:0:0:0 | & |
|
||||
| main.rs:1577:29:1577:30 | v2 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1577:29:1577:30 | v2 | &T | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1578:13:1578:19 | vec2_gt | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1578:23:1578:24 | v1 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1578:23:1578:29 | ... > ... | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1578:28:1578:29 | v2 | | file://:0:0:0:0 | & |
|
||||
| main.rs:1578:28:1578:29 | v2 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1578:28:1578:29 | v2 | &T | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1579:13:1579:19 | vec2_ge | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1579:23:1579:24 | v1 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1579:23:1579:30 | ... >= ... | | file:///BUILTINS/types.rs:3:1:5:16 | bool |
|
||||
| main.rs:1579:29:1579:30 | v2 | | file://:0:0:0:0 | & |
|
||||
| main.rs:1579:29:1579:30 | v2 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1579:29:1579:30 | v2 | &T | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1582:13:1582:20 | vec2_add | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1582:24:1582:25 | v1 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1582:24:1582:30 | ... + ... | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1582:29:1582:30 | v2 | | file://:0:0:0:0 | & |
|
||||
| main.rs:1582:29:1582:30 | v2 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1582:29:1582:30 | v2 | &T | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1583:13:1583:20 | vec2_sub | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1583:24:1583:25 | v1 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1583:24:1583:30 | ... - ... | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1583:29:1583:30 | v2 | | file://:0:0:0:0 | & |
|
||||
| main.rs:1583:29:1583:30 | v2 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1583:29:1583:30 | v2 | &T | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1584:13:1584:20 | vec2_mul | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1584:24:1584:25 | v1 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1584:24:1584:30 | ... * ... | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1584:29:1584:30 | v2 | | file://:0:0:0:0 | & |
|
||||
| main.rs:1584:29:1584:30 | v2 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1584:29:1584:30 | v2 | &T | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1585:13:1585:20 | vec2_div | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1585:24:1585:25 | v1 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1585:24:1585:30 | ... / ... | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1585:29:1585:30 | v2 | | file://:0:0:0:0 | & |
|
||||
| main.rs:1585:29:1585:30 | v2 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1585:29:1585:30 | v2 | &T | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1586:13:1586:20 | vec2_rem | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1586:24:1586:25 | v1 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1586:24:1586:30 | ... % ... | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1586:29:1586:30 | v2 | | file://:0:0:0:0 | & |
|
||||
| main.rs:1586:29:1586:30 | v2 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1586:29:1586:30 | v2 | &T | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1589:13:1589:31 | mut vec2_add_assign | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1589:35:1589:36 | v1 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1590:9:1590:23 | vec2_add_assign | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1590:9:1590:29 | ... += ... | | file://:0:0:0:0 | () |
|
||||
| main.rs:1590:28:1590:29 | v2 | | file://:0:0:0:0 | & |
|
||||
| main.rs:1590:28:1590:29 | v2 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1590:28:1590:29 | v2 | &T | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1592:13:1592:31 | mut vec2_sub_assign | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1592:35:1592:36 | v1 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1593:9:1593:23 | vec2_sub_assign | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1593:9:1593:29 | ... -= ... | | file://:0:0:0:0 | () |
|
||||
| main.rs:1593:28:1593:29 | v2 | | file://:0:0:0:0 | & |
|
||||
| main.rs:1593:28:1593:29 | v2 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1593:28:1593:29 | v2 | &T | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1595:13:1595:31 | mut vec2_mul_assign | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1595:35:1595:36 | v1 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1596:9:1596:23 | vec2_mul_assign | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1596:9:1596:29 | ... *= ... | | file://:0:0:0:0 | () |
|
||||
| main.rs:1596:28:1596:29 | v2 | | file://:0:0:0:0 | & |
|
||||
| main.rs:1596:28:1596:29 | v2 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1596:28:1596:29 | v2 | &T | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1598:13:1598:31 | mut vec2_div_assign | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1598:35:1598:36 | v1 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1599:9:1599:23 | vec2_div_assign | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1599:9:1599:29 | ... /= ... | | file://:0:0:0:0 | () |
|
||||
| main.rs:1599:28:1599:29 | v2 | | file://:0:0:0:0 | & |
|
||||
| main.rs:1599:28:1599:29 | v2 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1599:28:1599:29 | v2 | &T | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1601:13:1601:31 | mut vec2_rem_assign | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1601:35:1601:36 | v1 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1602:9:1602:23 | vec2_rem_assign | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1602:9:1602:29 | ... %= ... | | file://:0:0:0:0 | () |
|
||||
| main.rs:1602:28:1602:29 | v2 | | file://:0:0:0:0 | & |
|
||||
| main.rs:1602:28:1602:29 | v2 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1602:28:1602:29 | v2 | &T | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1605:13:1605:23 | vec2_bitand | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1605:27:1605:28 | v1 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1605:27:1605:33 | ... & ... | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1605:32:1605:33 | v2 | | file://:0:0:0:0 | & |
|
||||
| main.rs:1605:32:1605:33 | v2 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1605:32:1605:33 | v2 | &T | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1606:13:1606:22 | vec2_bitor | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1606:26:1606:27 | v1 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1606:26:1606:32 | ... \| ... | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1606:31:1606:32 | v2 | | file://:0:0:0:0 | & |
|
||||
| main.rs:1606:31:1606:32 | v2 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1606:31:1606:32 | v2 | &T | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1607:13:1607:23 | vec2_bitxor | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1607:27:1607:28 | v1 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1607:27:1607:33 | ... ^ ... | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1607:32:1607:33 | v2 | | file://:0:0:0:0 | & |
|
||||
| main.rs:1607:32:1607:33 | v2 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1607:32:1607:33 | v2 | &T | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1608:13:1608:20 | vec2_shl | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1608:24:1608:25 | v1 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1608:24:1608:33 | ... << ... | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1608:30:1608:33 | 1u32 | | file:///BUILTINS/types.rs:17:1:17:15 | u32 |
|
||||
| main.rs:1609:13:1609:20 | vec2_shr | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1609:24:1609:25 | v1 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1609:24:1609:33 | ... >> ... | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1609:30:1609:33 | 1u32 | | file:///BUILTINS/types.rs:17:1:17:15 | u32 |
|
||||
| main.rs:1612:13:1612:34 | mut vec2_bitand_assign | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1612:38:1612:39 | v1 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1613:9:1613:26 | vec2_bitand_assign | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1613:9:1613:32 | ... &= ... | | file://:0:0:0:0 | () |
|
||||
| main.rs:1613:31:1613:32 | v2 | | file://:0:0:0:0 | & |
|
||||
| main.rs:1613:31:1613:32 | v2 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1613:31:1613:32 | v2 | &T | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1615:13:1615:33 | mut vec2_bitor_assign | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1615:37:1615:38 | v1 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1616:9:1616:25 | vec2_bitor_assign | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1616:9:1616:31 | ... \|= ... | | file://:0:0:0:0 | () |
|
||||
| main.rs:1616:30:1616:31 | v2 | | file://:0:0:0:0 | & |
|
||||
| main.rs:1616:30:1616:31 | v2 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1616:30:1616:31 | v2 | &T | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1618:13:1618:34 | mut vec2_bitxor_assign | | main.rs:1278:5:1283:5 | Vec2 |
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| main.rs:1618:38:1618:39 | v1 | | main.rs:1278:5:1283:5 | Vec2 |
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| main.rs:1619:9:1619:26 | vec2_bitxor_assign | | main.rs:1278:5:1283:5 | Vec2 |
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| main.rs:1619:9:1619:32 | ... ^= ... | | file://:0:0:0:0 | () |
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| main.rs:1619:31:1619:32 | v2 | | file://:0:0:0:0 | & |
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| main.rs:1619:31:1619:32 | v2 | | main.rs:1278:5:1283:5 | Vec2 |
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| main.rs:1619:31:1619:32 | v2 | &T | main.rs:1278:5:1283:5 | Vec2 |
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| main.rs:1621:13:1621:31 | mut vec2_shl_assign | | main.rs:1278:5:1283:5 | Vec2 |
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| main.rs:1621:35:1621:36 | v1 | | main.rs:1278:5:1283:5 | Vec2 |
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| main.rs:1622:9:1622:23 | vec2_shl_assign | | main.rs:1278:5:1283:5 | Vec2 |
|
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@@ -2232,7 +2369,11 @@ inferType
|
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| main.rs:1625:9:1625:23 | vec2_shr_assign | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1625:9:1625:32 | ... >>= ... | | file://:0:0:0:0 | () |
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| main.rs:1625:29:1625:32 | 1u32 | | file:///BUILTINS/types.rs:17:1:17:15 | u32 |
|
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| main.rs:1628:13:1628:20 | vec2_neg | | main.rs:1278:5:1283:5 | Vec2 |
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||||
| main.rs:1628:24:1628:26 | - ... | | main.rs:1278:5:1283:5 | Vec2 |
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||||
| main.rs:1628:25:1628:26 | v1 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1629:13:1629:20 | vec2_not | | main.rs:1278:5:1283:5 | Vec2 |
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||||
| main.rs:1629:24:1629:26 | ! ... | | main.rs:1278:5:1283:5 | Vec2 |
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||||
| main.rs:1629:25:1629:26 | v1 | | main.rs:1278:5:1283:5 | Vec2 |
|
||||
| main.rs:1635:5:1635:20 | ...::f(...) | | main.rs:67:5:67:21 | Foo |
|
||||
| main.rs:1636:5:1636:60 | ...::g(...) | | main.rs:67:5:67:21 | Foo |
|
||||
|
||||
Reference in New Issue
Block a user