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Rust: Make fixes in data flow based on PR feedback
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@@ -96,7 +96,7 @@ module Node {
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final class ArgumentNode = NaNode;
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/** An SSA node. */
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abstract class SsaNode extends Node, TSsaNode {
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class SsaNode extends Node, TSsaNode {
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SsaImpl::DataFlowIntegration::SsaNode node;
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SsaImpl::DefinitionExt def;
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@@ -469,10 +469,7 @@ private module DataFlowIntegrationInput implements Impl::DataFlowIntegrationInpu
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/** Holds if SSA definition `def` assigns `value` to the underlying variable. */
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predicate ssaDefAssigns(WriteDefinition def, Expr value) {
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exists(BasicBlock bb, int i |
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def.definesAt(_, bb, i) and
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value.getAstNode() = bb.getNode(i).getAstNode().(AssignmentExpr).getRhs()
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)
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exists(BasicBlock bb, int i | def.definesAt(_, bb, i) and value = bb.getNode(i))
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}
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class Parameter = Param;
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@@ -1,12 +1,24 @@
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| main.rs:2:9:2:9 | s | main.rs:3:33:3:33 | s |
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| main.rs:6:18:6:21 | cond | main.rs:9:16:9:19 | cond |
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| main.rs:7:9:7:9 | a | main.rs:10:9:10:9 | a |
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| main.rs:8:9:8:9 | b | main.rs:12:9:12:9 | b |
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| main.rs:9:9:9:9 | c | main.rs:14:5:14:5 | c |
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| main.rs:9:21:11:5 | BlockExpr | main.rs:9:13:13:5 | IfExpr |
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| main.rs:10:9:10:9 | a | main.rs:9:21:11:5 | BlockExpr |
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| main.rs:11:12:13:5 | BlockExpr | main.rs:9:13:13:5 | IfExpr |
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| main.rs:12:9:12:9 | b | main.rs:11:12:13:5 | BlockExpr |
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| main.rs:14:5:14:5 | c | main.rs:6:37:15:1 | BlockExpr |
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| main.rs:18:9:18:9 | a | main.rs:20:15:20:15 | a |
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| main.rs:19:9:19:9 | b | main.rs:22:5:22:5 | b |
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| main.rs:20:9:20:15 | BreakExpr | main.rs:19:13:21:5 | LoopExpr |
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| main.rs:20:15:20:15 | a | main.rs:20:9:20:15 | BreakExpr |
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| main.rs:22:5:22:5 | b | main.rs:17:29:23:1 | BlockExpr |
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| main.rs:27:5:27:5 | i | main.rs:27:5:27:5 | i |
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| main.rs:27:5:27:5 | i | main.rs:28:5:28:5 | i |
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| main.rs:28:5:28:5 | i | main.rs:25:24:29:1 | BlockExpr |
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| main.rs:31:21:31:21 | a | main.rs:33:20:33:20 | a |
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| main.rs:31:29:31:29 | b | main.rs:34:17:34:17 | b |
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| main.rs:31:37:31:37 | c | main.rs:32:11:32:11 | c |
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| main.rs:32:5:35:5 | MatchExpr | main.rs:31:60:36:1 | BlockExpr |
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| main.rs:33:20:33:20 | a | main.rs:32:5:35:5 | MatchExpr |
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| main.rs:34:17:34:17 | b | main.rs:32:5:35:5 | MatchExpr |
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