C++: Accept more updated test output

This commit is contained in:
Robert Marsh
2022-06-14 15:54:50 -04:00
parent d508826b0f
commit e7e517bd6f
8 changed files with 477 additions and 199 deletions

View File

@@ -13565,22 +13565,22 @@ ir.cpp:
# 1757| Type = [IntType] int
# 1757| getEntryPoint(): [BlockStmt] { ... }
# 1758| getStmt(0): [IfStmt] if (...) ...
# 1758| getCondition(): [ConditionDeclExpr] (condition decl)
# 1758| Type = [BoolType] bool
# 1758| ValueCategory = prvalue
# 1758| getChild(0): [AddExpr] ... + ...
# 1758| getInitialization(): [DeclStmt] declaration
# 1758| getDeclarationEntry(0): [VariableDeclarationEntry] definition of y
# 1758| Type = [IntType] int
# 1758| ValueCategory = prvalue
# 1758| getLeftOperand(): [VariableAccess] x
# 1758| Type = [IntType] int
# 1758| ValueCategory = prvalue(load)
# 1758| getRightOperand(): [Literal] 1
# 1758| Type = [IntType] int
# 1758| Value = [Literal] 1
# 1758| ValueCategory = prvalue
# 1758| getChild(0).getFullyConverted(): [CStyleCast] (bool)...
# 1758| Conversion = [BoolConversion] conversion to bool
# 1758| Type = [BoolType] bool
# 1758| getVariable().getInitializer(): [Initializer] initializer for y
# 1758| getExpr(): [VariableAccess] x
# 1758| Type = [IntType] int
# 1758| ValueCategory = prvalue(load)
# 1758| getCondition(): [AddExpr] ... + ...
# 1758| Type = [IntType] int
# 1758| ValueCategory = prvalue
# 1758| getLeftOperand(): [VariableAccess] x
# 1758| Type = [IntType] int
# 1758| ValueCategory = prvalue(load)
# 1758| getRightOperand(): [Literal] 1
# 1758| Type = [IntType] int
# 1758| Value = [Literal] 1
# 1758| ValueCategory = prvalue
# 1758| getThen(): [BlockStmt] { ... }
# 1759| getStmt(0): [ExprStmt] ExprStmt
@@ -13599,26 +13599,33 @@ ir.cpp:
# 1759| getRightOperand(): [VariableAccess] y
# 1759| Type = [IntType] int
# 1759| ValueCategory = prvalue(load)
# 1758| getCondition().getFullyConverted(): [CStyleCast] (bool)...
# 1758| Conversion = [BoolConversion] conversion to bool
# 1758| Type = [BoolType] bool
# 1758| ValueCategory = prvalue
# 1762| getStmt(1): [DeclStmt] declaration
# 1762| getDeclarationEntry(0): [VariableDeclarationEntry] definition of w
# 1762| Type = [IntType] int
# 1763| getStmt(2): [IfStmt] if (...) ...
# 1763| getCondition(): [ConditionDeclExpr] (condition decl)
# 1763| Type = [BoolType] bool
# 1763| ValueCategory = prvalue
# 1763| getChild(0): [AddExpr] ... + ...
# 1763| getInitialization(): [ExprStmt] ExprStmt
# 1763| getExpr(): [AssignExpr] ... = ...
# 1763| Type = [IntType] int
# 1763| ValueCategory = prvalue
# 1763| getLeftOperand(): [VariableAccess] x
# 1763| ValueCategory = lvalue
# 1763| getLValue(): [VariableAccess] w
# 1763| Type = [IntType] int
# 1763| ValueCategory = lvalue
# 1763| getRValue(): [VariableAccess] x
# 1763| Type = [IntType] int
# 1763| ValueCategory = prvalue(load)
# 1763| getRightOperand(): [Literal] 1
# 1763| Type = [IntType] int
# 1763| Value = [Literal] 1
# 1763| ValueCategory = prvalue
# 1763| getChild(0).getFullyConverted(): [CStyleCast] (bool)...
# 1763| Conversion = [BoolConversion] conversion to bool
# 1763| Type = [BoolType] bool
# 1763| getCondition(): [AddExpr] ... + ...
# 1763| Type = [IntType] int
# 1763| ValueCategory = prvalue
# 1763| getLeftOperand(): [VariableAccess] x
# 1763| Type = [IntType] int
# 1763| ValueCategory = prvalue(load)
# 1763| getRightOperand(): [Literal] 1
# 1763| Type = [IntType] int
# 1763| Value = [Literal] 1
# 1763| ValueCategory = prvalue
# 1763| getThen(): [BlockStmt] { ... }
# 1764| getStmt(0): [ExprStmt] ExprStmt
@@ -13637,7 +13644,21 @@ ir.cpp:
# 1764| getRightOperand(): [VariableAccess] w
# 1764| Type = [IntType] int
# 1764| ValueCategory = prvalue(load)
# 1763| getCondition().getFullyConverted(): [CStyleCast] (bool)...
# 1763| Conversion = [BoolConversion] conversion to bool
# 1763| Type = [BoolType] bool
# 1763| ValueCategory = prvalue
# 1767| getStmt(3): [IfStmt] if (...) ...
# 1767| getInitialization(): [ExprStmt] ExprStmt
# 1767| getExpr(): [AssignExpr] ... = ...
# 1767| Type = [IntType] int
# 1767| ValueCategory = lvalue
# 1767| getLValue(): [VariableAccess] w
# 1767| Type = [IntType] int
# 1767| ValueCategory = lvalue
# 1767| getRValue(): [VariableAccess] x
# 1767| Type = [IntType] int
# 1767| ValueCategory = prvalue(load)
# 1767| getCondition(): [ConditionDeclExpr] (condition decl)
# 1767| Type = [BoolType] bool
# 1767| ValueCategory = prvalue
@@ -13666,6 +13687,13 @@ ir.cpp:
# 1768| Type = [IntType] int
# 1768| ValueCategory = prvalue(load)
# 1771| getStmt(4): [IfStmt] if (...) ...
# 1771| getInitialization(): [DeclStmt] declaration
# 1771| getDeclarationEntry(0): [VariableDeclarationEntry] definition of v
# 1771| Type = [IntType] int
# 1771| getVariable().getInitializer(): [Initializer] initializer for v
# 1771| getExpr(): [VariableAccess] x
# 1771| Type = [IntType] int
# 1771| ValueCategory = prvalue(load)
# 1771| getCondition(): [ConditionDeclExpr] (condition decl)
# 1771| Type = [BoolType] bool
# 1771| ValueCategory = prvalue
@@ -13754,19 +13782,23 @@ ir.cpp:
# 1785| Type = [IntType] int
# 1785| getEntryPoint(): [BlockStmt] { ... }
# 1786| getStmt(0): [SwitchStmt] switch (...) ...
# 1786| getExpr(): [ConditionDeclExpr] (condition decl)
# 1786| getInitialization(): [DeclStmt] declaration
# 1786| getDeclarationEntry(0): [VariableDeclarationEntry] definition of y
# 1786| Type = [IntType] int
# 1786| getVariable().getInitializer(): [Initializer] initializer for y
# 1786| getExpr(): [VariableAccess] x
# 1786| Type = [IntType] int
# 1786| ValueCategory = prvalue(load)
# 1786| getExpr(): [AddExpr] ... + ...
# 1786| Type = [IntType] int
# 1786| ValueCategory = prvalue
# 1786| getChild(0): [AddExpr] ... + ...
# 1786| getLeftOperand(): [VariableAccess] x
# 1786| Type = [IntType] int
# 1786| ValueCategory = prvalue(load)
# 1786| getRightOperand(): [Literal] 1
# 1786| Type = [IntType] int
# 1786| Value = [Literal] 1
# 1786| ValueCategory = prvalue
# 1786| getLeftOperand(): [VariableAccess] x
# 1786| Type = [IntType] int
# 1786| ValueCategory = prvalue(load)
# 1786| getRightOperand(): [Literal] 1
# 1786| Type = [IntType] int
# 1786| Value = [Literal] 1
# 1786| ValueCategory = prvalue
# 1786| getStmt(): [BlockStmt] { ... }
# 1787| getStmt(0): [SwitchCase] default:
# 1788| getStmt(1): [ExprStmt] ExprStmt
@@ -13789,19 +13821,26 @@ ir.cpp:
# 1791| getDeclarationEntry(0): [VariableDeclarationEntry] definition of w
# 1791| Type = [IntType] int
# 1792| getStmt(2): [SwitchStmt] switch (...) ...
# 1792| getExpr(): [ConditionDeclExpr] (condition decl)
# 1792| Type = [IntType] int
# 1792| ValueCategory = prvalue
# 1792| getChild(0): [AddExpr] ... + ...
# 1792| getInitialization(): [ExprStmt] ExprStmt
# 1792| getExpr(): [AssignExpr] ... = ...
# 1792| Type = [IntType] int
# 1792| ValueCategory = prvalue
# 1792| getLeftOperand(): [VariableAccess] x
# 1792| ValueCategory = lvalue
# 1792| getLValue(): [VariableAccess] w
# 1792| Type = [IntType] int
# 1792| ValueCategory = lvalue
# 1792| getRValue(): [VariableAccess] x
# 1792| Type = [IntType] int
# 1792| ValueCategory = prvalue(load)
# 1792| getRightOperand(): [Literal] 1
# 1792| Type = [IntType] int
# 1792| Value = [Literal] 1
# 1792| ValueCategory = prvalue
# 1792| getExpr(): [AddExpr] ... + ...
# 1792| Type = [IntType] int
# 1792| ValueCategory = prvalue
# 1792| getLeftOperand(): [VariableAccess] x
# 1792| Type = [IntType] int
# 1792| ValueCategory = prvalue(load)
# 1792| getRightOperand(): [Literal] 1
# 1792| Type = [IntType] int
# 1792| Value = [Literal] 1
# 1792| ValueCategory = prvalue
# 1792| getStmt(): [BlockStmt] { ... }
# 1793| getStmt(0): [SwitchCase] default:
# 1794| getStmt(1): [ExprStmt] ExprStmt
@@ -13821,6 +13860,16 @@ ir.cpp:
# 1794| Type = [IntType] int
# 1794| ValueCategory = prvalue(load)
# 1797| getStmt(3): [SwitchStmt] switch (...) ...
# 1797| getInitialization(): [ExprStmt] ExprStmt
# 1797| getExpr(): [AssignExpr] ... = ...
# 1797| Type = [IntType] int
# 1797| ValueCategory = lvalue
# 1797| getLValue(): [VariableAccess] w
# 1797| Type = [IntType] int
# 1797| ValueCategory = lvalue
# 1797| getRValue(): [VariableAccess] x
# 1797| Type = [IntType] int
# 1797| ValueCategory = prvalue(load)
# 1797| getExpr(): [ConditionDeclExpr] (condition decl)
# 1797| Type = [IntType] int
# 1797| ValueCategory = prvalue
@@ -13846,6 +13895,13 @@ ir.cpp:
# 1799| Type = [IntType] int
# 1799| ValueCategory = prvalue(load)
# 1802| getStmt(4): [SwitchStmt] switch (...) ...
# 1802| getInitialization(): [DeclStmt] declaration
# 1802| getDeclarationEntry(0): [VariableDeclarationEntry] definition of v
# 1802| Type = [IntType] int
# 1802| getVariable().getInitializer(): [Initializer] initializer for v
# 1802| getExpr(): [VariableAccess] x
# 1802| Type = [IntType] int
# 1802| ValueCategory = prvalue(load)
# 1802| getExpr(): [ConditionDeclExpr] (condition decl)
# 1802| Type = [IntType] int
# 1802| ValueCategory = prvalue

View File

@@ -6,8 +6,6 @@ missingOperandType
duplicateChiOperand
sideEffectWithoutPrimary
instructionWithoutSuccessor
| ir.cpp:1757:28:1757:28 | InitializeParameter: x | Instruction 'InitializeParameter: x' has no successors in function '$@'. | ir.cpp:1757:6:1757:22 | void if_initialization(int) | void if_initialization(int) |
| ir.cpp:1785:32:1785:32 | InitializeParameter: x | Instruction 'InitializeParameter: x' has no successors in function '$@'. | ir.cpp:1785:6:1785:26 | void switch_initialization(int) | void switch_initialization(int) |
ambiguousSuccessors
unexplainedLoop
unnecessaryPhiInstruction

View File

@@ -6,8 +6,6 @@ missingOperandType
duplicateChiOperand
sideEffectWithoutPrimary
instructionWithoutSuccessor
| ir.cpp:1757:28:1757:28 | InitializeParameter: x | Instruction 'InitializeParameter: x' has no successors in function '$@'. | ir.cpp:1757:6:1757:22 | void if_initialization(int) | void if_initialization(int) |
| ir.cpp:1785:32:1785:32 | InitializeParameter: x | Instruction 'InitializeParameter: x' has no successors in function '$@'. | ir.cpp:1785:6:1785:26 | void switch_initialization(int) | void switch_initialization(int) |
ambiguousSuccessors
unexplainedLoop
unnecessaryPhiInstruction

View File

@@ -8225,10 +8225,246 @@
| ir.cpp:1754:42:1754:42 | Unary | r1754_6 |
| ir.cpp:1757:6:1757:22 | ChiPartial | partial:m1757_3 |
| ir.cpp:1757:6:1757:22 | ChiTotal | total:m1757_2 |
| ir.cpp:1757:6:1757:22 | SideEffect | m1757_3 |
| ir.cpp:1757:28:1757:28 | Address | &:r1757_5 |
| ir.cpp:1758:13:1758:13 | Address | &:r1758_1 |
| ir.cpp:1758:17:1758:17 | Address | &:r1758_2 |
| ir.cpp:1758:17:1758:17 | Load | m1757_6 |
| ir.cpp:1758:17:1758:17 | StoreValue | r1758_3 |
| ir.cpp:1758:20:1758:20 | Address | &:r1758_5 |
| ir.cpp:1758:20:1758:20 | Left | r1758_6 |
| ir.cpp:1758:20:1758:20 | Load | m1757_6 |
| ir.cpp:1758:20:1758:24 | Condition | r1758_10 |
| ir.cpp:1758:20:1758:24 | Left | r1758_8 |
| ir.cpp:1758:20:1758:24 | Right | r1758_9 |
| ir.cpp:1758:24:1758:24 | Right | r1758_7 |
| ir.cpp:1759:9:1759:9 | Address | &:r1759_6 |
| ir.cpp:1759:13:1759:13 | Address | &:r1759_1 |
| ir.cpp:1759:13:1759:13 | Left | r1759_2 |
| ir.cpp:1759:13:1759:13 | Load | m1757_6 |
| ir.cpp:1759:13:1759:17 | StoreValue | r1759_5 |
| ir.cpp:1759:17:1759:17 | Address | &:r1759_3 |
| ir.cpp:1759:17:1759:17 | Load | m1758_4 |
| ir.cpp:1759:17:1759:17 | Right | r1759_4 |
| ir.cpp:1762:9:1762:9 | Address | &:r1762_2 |
| ir.cpp:1762:9:1762:9 | Phi | from 0:m1757_6 |
| ir.cpp:1762:9:1762:9 | Phi | from 1:m1759_7 |
| ir.cpp:1763:9:1763:9 | Address | &:r1763_3 |
| ir.cpp:1763:13:1763:13 | Address | &:r1763_1 |
| ir.cpp:1763:13:1763:13 | Load | m1762_1 |
| ir.cpp:1763:13:1763:13 | StoreValue | r1763_2 |
| ir.cpp:1763:16:1763:16 | Address | &:r1763_5 |
| ir.cpp:1763:16:1763:16 | Left | r1763_6 |
| ir.cpp:1763:16:1763:16 | Load | m1762_1 |
| ir.cpp:1763:16:1763:20 | Condition | r1763_10 |
| ir.cpp:1763:16:1763:20 | Left | r1763_8 |
| ir.cpp:1763:16:1763:20 | Right | r1763_9 |
| ir.cpp:1763:20:1763:20 | Right | r1763_7 |
| ir.cpp:1764:9:1764:9 | Address | &:r1764_6 |
| ir.cpp:1764:13:1764:13 | Address | &:r1764_1 |
| ir.cpp:1764:13:1764:13 | Left | r1764_2 |
| ir.cpp:1764:13:1764:13 | Load | m1762_1 |
| ir.cpp:1764:13:1764:17 | StoreValue | r1764_5 |
| ir.cpp:1764:17:1764:17 | Address | &:r1764_3 |
| ir.cpp:1764:17:1764:17 | Load | m1763_4 |
| ir.cpp:1764:17:1764:17 | Right | r1764_4 |
| ir.cpp:1767:9:1767:9 | Address | &:r1767_4 |
| ir.cpp:1767:13:1767:13 | Address | &:r1767_2 |
| ir.cpp:1767:13:1767:13 | Load | m1767_1 |
| ir.cpp:1767:13:1767:13 | Phi | from 2:m1762_1 |
| ir.cpp:1767:13:1767:13 | Phi | from 3:m1764_7 |
| ir.cpp:1767:13:1767:13 | StoreValue | r1767_3 |
| ir.cpp:1767:14:1767:25 | Address | &:r1767_6 |
| ir.cpp:1767:14:1767:25 | Condition | r1767_14 |
| ir.cpp:1767:20:1767:21 | Address | &:r1767_10 |
| ir.cpp:1767:20:1767:21 | Left | r1767_11 |
| ir.cpp:1767:20:1767:21 | Load | m1767_9 |
| ir.cpp:1767:20:1767:21 | Right | r1767_12 |
| ir.cpp:1767:20:1767:21 | Unary | r1767_13 |
| ir.cpp:1767:25:1767:25 | Address | &:r1767_7 |
| ir.cpp:1767:25:1767:25 | Load | m1767_5 |
| ir.cpp:1767:25:1767:25 | StoreValue | r1767_8 |
| ir.cpp:1768:9:1768:9 | Address | &:r1768_6 |
| ir.cpp:1768:13:1768:13 | Address | &:r1768_1 |
| ir.cpp:1768:13:1768:13 | Left | r1768_2 |
| ir.cpp:1768:13:1768:13 | Load | m1767_1 |
| ir.cpp:1768:13:1768:17 | StoreValue | r1768_5 |
| ir.cpp:1768:17:1768:17 | Address | &:r1768_3 |
| ir.cpp:1768:17:1768:17 | Load | m1767_5 |
| ir.cpp:1768:17:1768:17 | Right | r1768_4 |
| ir.cpp:1771:9:1771:29 | Address | &:r1771_6 |
| ir.cpp:1771:9:1771:29 | Condition | r1771_14 |
| ir.cpp:1771:13:1771:13 | Address | &:r1771_2 |
| ir.cpp:1771:13:1771:13 | Phi | from 4:m1767_1 |
| ir.cpp:1771:13:1771:13 | Phi | from 5:m1768_7 |
| ir.cpp:1771:17:1771:17 | Address | &:r1771_3 |
| ir.cpp:1771:17:1771:17 | Load | m1771_1 |
| ir.cpp:1771:17:1771:17 | StoreValue | r1771_4 |
| ir.cpp:1771:24:1771:25 | Address | &:r1771_10 |
| ir.cpp:1771:24:1771:25 | Left | r1771_11 |
| ir.cpp:1771:24:1771:25 | Load | m1771_9 |
| ir.cpp:1771:24:1771:25 | Right | r1771_12 |
| ir.cpp:1771:24:1771:25 | Unary | r1771_13 |
| ir.cpp:1771:29:1771:29 | Address | &:r1771_7 |
| ir.cpp:1771:29:1771:29 | Load | m1771_5 |
| ir.cpp:1771:29:1771:29 | StoreValue | r1771_8 |
| ir.cpp:1772:9:1772:9 | Address | &:r1772_6 |
| ir.cpp:1772:13:1772:13 | Address | &:r1772_1 |
| ir.cpp:1772:13:1772:13 | Left | r1772_2 |
| ir.cpp:1772:13:1772:13 | Load | m1771_1 |
| ir.cpp:1772:13:1772:17 | StoreValue | r1772_5 |
| ir.cpp:1772:17:1772:17 | Address | &:r1772_3 |
| ir.cpp:1772:17:1772:17 | Load | m1771_5 |
| ir.cpp:1772:17:1772:17 | Right | r1772_4 |
| ir.cpp:1775:9:1775:9 | Address | &:r1775_2 |
| ir.cpp:1775:9:1775:9 | Phi | from 6:m1771_1 |
| ir.cpp:1775:9:1775:9 | Phi | from 7:m1772_7 |
| ir.cpp:1775:13:1775:13 | Address | &:r1775_3 |
| ir.cpp:1775:13:1775:13 | Load | m1775_1 |
| ir.cpp:1775:13:1775:13 | StoreValue | r1775_4 |
| ir.cpp:1776:9:1776:9 | Address | &:r1776_1 |
| ir.cpp:1776:9:1776:9 | Condition | r1776_4 |
| ir.cpp:1776:9:1776:9 | Left | r1776_2 |
| ir.cpp:1776:9:1776:9 | Load | m1775_5 |
| ir.cpp:1776:9:1776:9 | Right | r1776_3 |
| ir.cpp:1777:9:1777:9 | Address | &:r1777_6 |
| ir.cpp:1777:13:1777:13 | Address | &:r1777_1 |
| ir.cpp:1777:13:1777:13 | Left | r1777_2 |
| ir.cpp:1777:13:1777:13 | Load | m1775_1 |
| ir.cpp:1777:13:1777:17 | StoreValue | r1777_5 |
| ir.cpp:1777:17:1777:17 | Address | &:r1777_3 |
| ir.cpp:1777:17:1777:17 | Load | m1775_5 |
| ir.cpp:1777:17:1777:17 | Right | r1777_4 |
| ir.cpp:1780:9:1780:18 | Address | &:r1780_2 |
| ir.cpp:1780:9:1780:18 | Condition | r1780_10 |
| ir.cpp:1780:9:1780:18 | Phi | from 8:m1775_1 |
| ir.cpp:1780:9:1780:18 | Phi | from 9:m1777_7 |
| ir.cpp:1780:13:1780:14 | Address | &:r1780_6 |
| ir.cpp:1780:13:1780:14 | Left | r1780_7 |
| ir.cpp:1780:13:1780:14 | Load | m1780_5 |
| ir.cpp:1780:13:1780:14 | Right | r1780_8 |
| ir.cpp:1780:13:1780:14 | Unary | r1780_9 |
| ir.cpp:1780:18:1780:18 | Address | &:r1780_3 |
| ir.cpp:1780:18:1780:18 | Load | m1775_5 |
| ir.cpp:1780:18:1780:18 | StoreValue | r1780_4 |
| ir.cpp:1781:9:1781:9 | Address | &:r1781_3 |
| ir.cpp:1781:9:1781:9 | Address | &:r1781_3 |
| ir.cpp:1781:9:1781:9 | Left | r1781_4 |
| ir.cpp:1781:9:1781:9 | Load | m1780_1 |
| ir.cpp:1781:9:1781:15 | StoreValue | r1781_5 |
| ir.cpp:1781:14:1781:15 | Address | &:r1781_1 |
| ir.cpp:1781:14:1781:15 | Load | m1780_5 |
| ir.cpp:1781:14:1781:15 | Right | r1781_2 |
| ir.cpp:1785:6:1785:26 | ChiPartial | partial:m1785_3 |
| ir.cpp:1785:6:1785:26 | ChiTotal | total:m1785_2 |
| ir.cpp:1785:6:1785:26 | SideEffect | m1785_3 |
| ir.cpp:1785:32:1785:32 | Address | &:r1785_5 |
| ir.cpp:1786:17:1786:17 | Address | &:r1786_1 |
| ir.cpp:1786:21:1786:21 | Address | &:r1786_2 |
| ir.cpp:1786:21:1786:21 | Load | m1785_6 |
| ir.cpp:1786:21:1786:21 | StoreValue | r1786_3 |
| ir.cpp:1786:24:1786:24 | Address | &:r1786_5 |
| ir.cpp:1786:24:1786:24 | Left | r1786_6 |
| ir.cpp:1786:24:1786:24 | Load | m1785_6 |
| ir.cpp:1786:24:1786:28 | Condition | r1786_8 |
| ir.cpp:1786:28:1786:28 | Right | r1786_7 |
| ir.cpp:1788:9:1788:9 | Address | &:r1788_6 |
| ir.cpp:1788:13:1788:13 | Address | &:r1788_1 |
| ir.cpp:1788:13:1788:13 | Left | r1788_2 |
| ir.cpp:1788:13:1788:13 | Load | m1785_6 |
| ir.cpp:1788:13:1788:17 | StoreValue | r1788_5 |
| ir.cpp:1788:17:1788:17 | Address | &:r1788_3 |
| ir.cpp:1788:17:1788:17 | Load | m1786_4 |
| ir.cpp:1788:17:1788:17 | Right | r1788_4 |
| ir.cpp:1791:9:1791:9 | Address | &:r1791_1 |
| ir.cpp:1792:13:1792:13 | Address | &:r1792_3 |
| ir.cpp:1792:17:1792:17 | Address | &:r1792_1 |
| ir.cpp:1792:17:1792:17 | Load | m1788_7 |
| ir.cpp:1792:17:1792:17 | StoreValue | r1792_2 |
| ir.cpp:1792:20:1792:20 | Address | &:r1792_5 |
| ir.cpp:1792:20:1792:20 | Left | r1792_6 |
| ir.cpp:1792:20:1792:20 | Load | m1788_7 |
| ir.cpp:1792:20:1792:24 | Condition | r1792_8 |
| ir.cpp:1792:24:1792:24 | Right | r1792_7 |
| ir.cpp:1794:9:1794:9 | Address | &:r1794_6 |
| ir.cpp:1794:13:1794:13 | Address | &:r1794_1 |
| ir.cpp:1794:13:1794:13 | Left | r1794_2 |
| ir.cpp:1794:13:1794:13 | Load | m1788_7 |
| ir.cpp:1794:13:1794:17 | StoreValue | r1794_5 |
| ir.cpp:1794:17:1794:17 | Address | &:r1794_3 |
| ir.cpp:1794:17:1794:17 | Load | m1792_4 |
| ir.cpp:1794:17:1794:17 | Right | r1794_4 |
| ir.cpp:1797:13:1797:13 | Address | &:r1797_3 |
| ir.cpp:1797:17:1797:17 | Address | &:r1797_1 |
| ir.cpp:1797:17:1797:17 | Load | m1794_7 |
| ir.cpp:1797:17:1797:17 | StoreValue | r1797_2 |
| ir.cpp:1797:18:1797:29 | Address | &:r1797_5 |
| ir.cpp:1797:18:1797:29 | Condition | r1797_11 |
| ir.cpp:1797:24:1797:25 | Address | &:r1797_9 |
| ir.cpp:1797:24:1797:25 | Load | m1797_8 |
| ir.cpp:1797:24:1797:25 | Unary | r1797_10 |
| ir.cpp:1797:29:1797:29 | Address | &:r1797_6 |
| ir.cpp:1797:29:1797:29 | Load | m1797_4 |
| ir.cpp:1797:29:1797:29 | StoreValue | r1797_7 |
| ir.cpp:1799:9:1799:9 | Address | &:r1799_6 |
| ir.cpp:1799:13:1799:13 | Address | &:r1799_1 |
| ir.cpp:1799:13:1799:13 | Left | r1799_2 |
| ir.cpp:1799:13:1799:13 | Load | m1794_7 |
| ir.cpp:1799:13:1799:17 | StoreValue | r1799_5 |
| ir.cpp:1799:17:1799:17 | Address | &:r1799_3 |
| ir.cpp:1799:17:1799:17 | Load | m1797_4 |
| ir.cpp:1799:17:1799:17 | Right | r1799_4 |
| ir.cpp:1802:13:1802:33 | Address | &:r1802_5 |
| ir.cpp:1802:13:1802:33 | Condition | r1802_11 |
| ir.cpp:1802:17:1802:17 | Address | &:r1802_1 |
| ir.cpp:1802:21:1802:21 | Address | &:r1802_2 |
| ir.cpp:1802:21:1802:21 | Load | m1799_7 |
| ir.cpp:1802:21:1802:21 | StoreValue | r1802_3 |
| ir.cpp:1802:28:1802:29 | Address | &:r1802_9 |
| ir.cpp:1802:28:1802:29 | Load | m1802_8 |
| ir.cpp:1802:28:1802:29 | Unary | r1802_10 |
| ir.cpp:1802:33:1802:33 | Address | &:r1802_6 |
| ir.cpp:1802:33:1802:33 | Load | m1802_4 |
| ir.cpp:1802:33:1802:33 | StoreValue | r1802_7 |
| ir.cpp:1804:9:1804:9 | Address | &:r1804_6 |
| ir.cpp:1804:13:1804:13 | Address | &:r1804_1 |
| ir.cpp:1804:13:1804:13 | Left | r1804_2 |
| ir.cpp:1804:13:1804:13 | Load | m1799_7 |
| ir.cpp:1804:13:1804:17 | StoreValue | r1804_5 |
| ir.cpp:1804:17:1804:17 | Address | &:r1804_3 |
| ir.cpp:1804:17:1804:17 | Load | m1802_4 |
| ir.cpp:1804:17:1804:17 | Right | r1804_4 |
| ir.cpp:1807:9:1807:9 | Address | &:r1807_1 |
| ir.cpp:1807:13:1807:13 | Address | &:r1807_2 |
| ir.cpp:1807:13:1807:13 | Load | m1804_7 |
| ir.cpp:1807:13:1807:13 | StoreValue | r1807_3 |
| ir.cpp:1808:13:1808:13 | Address | &:r1808_1 |
| ir.cpp:1808:13:1808:13 | Condition | r1808_2 |
| ir.cpp:1808:13:1808:13 | Load | m1807_4 |
| ir.cpp:1810:9:1810:9 | Address | &:r1810_6 |
| ir.cpp:1810:13:1810:13 | Address | &:r1810_1 |
| ir.cpp:1810:13:1810:13 | Left | r1810_2 |
| ir.cpp:1810:13:1810:13 | Load | m1804_7 |
| ir.cpp:1810:13:1810:17 | StoreValue | r1810_5 |
| ir.cpp:1810:17:1810:17 | Address | &:r1810_3 |
| ir.cpp:1810:17:1810:17 | Load | m1807_4 |
| ir.cpp:1810:17:1810:17 | Right | r1810_4 |
| ir.cpp:1813:13:1813:22 | Address | &:r1813_1 |
| ir.cpp:1813:13:1813:22 | Condition | r1813_7 |
| ir.cpp:1813:17:1813:18 | Address | &:r1813_5 |
| ir.cpp:1813:17:1813:18 | Load | m1813_4 |
| ir.cpp:1813:17:1813:18 | Unary | r1813_6 |
| ir.cpp:1813:22:1813:22 | Address | &:r1813_2 |
| ir.cpp:1813:22:1813:22 | Load | m1807_4 |
| ir.cpp:1813:22:1813:22 | StoreValue | r1813_3 |
| ir.cpp:1815:9:1815:9 | Address | &:r1815_3 |
| ir.cpp:1815:9:1815:9 | Address | &:r1815_3 |
| ir.cpp:1815:9:1815:9 | Left | r1815_4 |
| ir.cpp:1815:9:1815:9 | Load | m1810_7 |
| ir.cpp:1815:9:1815:15 | StoreValue | r1815_5 |
| ir.cpp:1815:14:1815:15 | Address | &:r1815_1 |
| ir.cpp:1815:14:1815:15 | Load | m1813_4 |
| ir.cpp:1815:14:1815:15 | Right | r1815_2 |
| ir.cpp:1821:5:1821:12 | Address | &:r1821_3 |
| ir.cpp:1821:5:1821:12 | SideEffect | ~m1821_6 |
| ir.cpp:1821:16:1821:16 | ChiPartial | partial:m1821_5 |

View File

@@ -1,8 +1,4 @@
missingOperand
| ir.cpp:1758:9:1758:24 | CopyValue: (condition decl) | Instruction 'CopyValue' is missing an expected operand with tag 'Unary' in function '$@'. | ir.cpp:1757:6:1757:22 | void if_initialization(int) | void if_initialization(int) |
| ir.cpp:1763:14:1763:20 | CopyValue: (condition decl) | Instruction 'CopyValue' is missing an expected operand with tag 'Unary' in function '$@'. | ir.cpp:1757:6:1757:22 | void if_initialization(int) | void if_initialization(int) |
| ir.cpp:1786:13:1786:28 | CopyValue: (condition decl) | Instruction 'CopyValue' is missing an expected operand with tag 'Unary' in function '$@'. | ir.cpp:1785:6:1785:26 | void switch_initialization(int) | void switch_initialization(int) |
| ir.cpp:1792:18:1792:24 | CopyValue: (condition decl) | Instruction 'CopyValue' is missing an expected operand with tag 'Unary' in function '$@'. | ir.cpp:1785:6:1785:26 | void switch_initialization(int) | void switch_initialization(int) |
unexpectedOperand
duplicateOperand
missingPhiOperand
@@ -11,14 +7,6 @@ duplicateChiOperand
sideEffectWithoutPrimary
instructionWithoutSuccessor
| ../../../include/memory.h:68:25:68:33 | CopyValue: (reference to) | Instruction 'CopyValue: (reference to)' has no successors in function '$@'. | ../../../include/memory.h:67:5:67:5 | void std::unique_ptr<int, std::default_delete<int>>::~unique_ptr() | void std::unique_ptr<int, std::default_delete<int>>::~unique_ptr() |
| ir.cpp:1757:28:1757:28 | InitializeParameter: x | Instruction 'InitializeParameter: x' has no successors in function '$@'. | ir.cpp:1757:6:1757:22 | void if_initialization(int) | void if_initialization(int) |
| ir.cpp:1758:20:1758:24 | CompareNE: (bool)... | Instruction 'CompareNE: (bool)...' has no successors in function '$@'. | ir.cpp:1757:6:1757:22 | void if_initialization(int) | void if_initialization(int) |
| ir.cpp:1762:9:1762:9 | Uninitialized: definition of w | Instruction 'Uninitialized: definition of w' has no successors in function '$@'. | ir.cpp:1757:6:1757:22 | void if_initialization(int) | void if_initialization(int) |
| ir.cpp:1763:16:1763:20 | CompareNE: (bool)... | Instruction 'CompareNE: (bool)...' has no successors in function '$@'. | ir.cpp:1757:6:1757:22 | void if_initialization(int) | void if_initialization(int) |
| ir.cpp:1785:32:1785:32 | InitializeParameter: x | Instruction 'InitializeParameter: x' has no successors in function '$@'. | ir.cpp:1785:6:1785:26 | void switch_initialization(int) | void switch_initialization(int) |
| ir.cpp:1786:24:1786:28 | Add: ... + ... | Instruction 'Add: ... + ...' has no successors in function '$@'. | ir.cpp:1785:6:1785:26 | void switch_initialization(int) | void switch_initialization(int) |
| ir.cpp:1791:9:1791:9 | Uninitialized: definition of w | Instruction 'Uninitialized: definition of w' has no successors in function '$@'. | ir.cpp:1785:6:1785:26 | void switch_initialization(int) | void switch_initialization(int) |
| ir.cpp:1792:20:1792:24 | Add: ... + ... | Instruction 'Add: ... + ...' has no successors in function '$@'. | ir.cpp:1785:6:1785:26 | void switch_initialization(int) | void switch_initialization(int) |
ambiguousSuccessors
unexplainedLoop
unnecessaryPhiInstruction
@@ -40,12 +28,6 @@ nonUniqueEnclosingIRFunction
fieldAddressOnNonPointer
thisArgumentIsNonPointer
nonUniqueIRVariable
| ir.cpp:1759:17:1759:17 | VariableAddress: y | Variable address instruction 'VariableAddress: y' has no associated variable, in function '$@'. | ir.cpp:1757:6:1757:22 | void if_initialization(int) | void if_initialization(int) |
| ir.cpp:1771:29:1771:29 | VariableAddress: v | Variable address instruction 'VariableAddress: v' has no associated variable, in function '$@'. | ir.cpp:1757:6:1757:22 | void if_initialization(int) | void if_initialization(int) |
| ir.cpp:1772:17:1772:17 | VariableAddress: v | Variable address instruction 'VariableAddress: v' has no associated variable, in function '$@'. | ir.cpp:1757:6:1757:22 | void if_initialization(int) | void if_initialization(int) |
| ir.cpp:1788:17:1788:17 | VariableAddress: y | Variable address instruction 'VariableAddress: y' has no associated variable, in function '$@'. | ir.cpp:1785:6:1785:26 | void switch_initialization(int) | void switch_initialization(int) |
| ir.cpp:1802:33:1802:33 | VariableAddress: v | Variable address instruction 'VariableAddress: v' has no associated variable, in function '$@'. | ir.cpp:1785:6:1785:26 | void switch_initialization(int) | void switch_initialization(int) |
| ir.cpp:1804:17:1804:17 | VariableAddress: v | Variable address instruction 'VariableAddress: v' has no associated variable, in function '$@'. | ir.cpp:1785:6:1785:26 | void switch_initialization(int) | void switch_initialization(int) |
missingCanonicalLanguageType
multipleCanonicalLanguageTypes
missingIRType

View File

@@ -9438,50 +9438,48 @@ ir.cpp:
# 1757| mu1757_3(unknown) = InitializeNonLocal :
# 1757| r1757_4(glval<int>) = VariableAddress[x] :
# 1757| mu1757_5(int) = InitializeParameter[x] : &:r1757_4
# 1758| r1758_1(glval<int>) = VariableAddress[y] :
# 1758| r1758_2(glval<int>) = VariableAddress[x] :
# 1758| r1758_3(int) = Load[x] : &:r1758_2, ~m?
# 1758| mu1758_4(int) = Store[y] : &:r1758_1, r1758_3
# 1758| r1758_5(glval<int>) = VariableAddress[x] :
# 1758| r1758_6(int) = Load[x] : &:r1758_5, ~m?
# 1758| r1758_7(int) = Constant[1] :
# 1758| r1758_8(int) = Add : r1758_6, r1758_7
# 1758| r1758_9(int) = Constant[0] :
# 1758| r1758_10(bool) = CompareNE : r1758_8, r1758_9
# 1758| v1758_11(void) = ConditionalBranch : r1758_10
#-----| False -> Block 2
#-----| True -> Block 1
# 1758| (no string representation)
# 1758| CopyValue: (condition decl)
# 1758| ConditionalBranch: (condition decl)
#-----| False -> Block 4
#-----| True -> Block 3
# 1763| (no string representation)
# 1763| CopyValue: (condition decl)
# 1763| ConditionalBranch: (condition decl)
#-----| False -> Block 6
#-----| True -> Block 5
# 1758| Block 1
# 1758| r1758_1(glval<int>) = VariableAddress[x] :
# 1758| r1758_2(int) = Load[x] : &:r1758_1, ~m?
# 1758| r1758_3(int) = Constant[1] :
# 1758| r1758_4(int) = Add : r1758_2, r1758_3
# 1758| r1758_5(int) = Constant[0] :
# 1758| r1758_6(bool) = CompareNE : r1758_4, r1758_5
# 1763| Block 1
# 1763| r1763_1(glval<int>) = VariableAddress[x] :
# 1763| r1763_2(int) = Load[x] : &:r1763_1, ~m?
# 1763| r1763_3(int) = Constant[1] :
# 1763| r1763_4(int) = Add : r1763_2, r1763_3
# 1763| r1763_5(int) = Constant[0] :
# 1763| r1763_6(bool) = CompareNE : r1763_4, r1763_5
# 1759| Block 3
# 1759| Block 1
# 1759| r1759_1(glval<int>) = VariableAddress[x] :
# 1759| r1759_2(int) = Load[x] : &:r1759_1, ~m?
# 1759| r1759_3(glval<int>) = VariableAddress :
# 1759| r1759_4(int) = Load[?] : &:r1759_3, ~m?
# 1759| r1759_3(glval<int>) = VariableAddress[y] :
# 1759| r1759_4(int) = Load[y] : &:r1759_3, ~m?
# 1759| r1759_5(int) = Add : r1759_2, r1759_4
# 1759| r1759_6(glval<int>) = VariableAddress[x] :
# 1759| mu1759_7(int) = Store[x] : &:r1759_6, r1759_5
#-----| Goto -> Block 4
#-----| Goto -> Block 2
# 1762| Block 4
# 1762| Block 2
# 1762| r1762_1(glval<int>) = VariableAddress[w] :
# 1762| mu1762_2(int) = Uninitialized[w] : &:r1762_1
# 1763| r1763_1(glval<int>) = VariableAddress[x] :
# 1763| r1763_2(int) = Load[x] : &:r1763_1, ~m?
# 1763| r1763_3(glval<int>) = VariableAddress[w] :
# 1763| mu1763_4(int) = Store[w] : &:r1763_3, r1763_2
# 1763| r1763_5(glval<int>) = VariableAddress[x] :
# 1763| r1763_6(int) = Load[x] : &:r1763_5, ~m?
# 1763| r1763_7(int) = Constant[1] :
# 1763| r1763_8(int) = Add : r1763_6, r1763_7
# 1763| r1763_9(int) = Constant[0] :
# 1763| r1763_10(bool) = CompareNE : r1763_8, r1763_9
# 1763| v1763_11(void) = ConditionalBranch : r1763_10
#-----| False -> Block 4
#-----| True -> Block 3
# 1764| Block 5
# 1764| Block 3
# 1764| r1764_1(glval<int>) = VariableAddress[x] :
# 1764| r1764_2(int) = Load[x] : &:r1764_1, ~m?
# 1764| r1764_3(glval<int>) = VariableAddress[w] :
@@ -9489,23 +9487,27 @@ ir.cpp:
# 1764| r1764_5(int) = Add : r1764_2, r1764_4
# 1764| r1764_6(glval<int>) = VariableAddress[x] :
# 1764| mu1764_7(int) = Store[x] : &:r1764_6, r1764_5
#-----| Goto -> Block 6
#-----| Goto -> Block 4
# 1767| Block 6
# 1767| r1767_1(glval<int>) = VariableAddress[w2] :
# 1767| r1767_2(glval<int>) = VariableAddress[w] :
# 1767| r1767_3(int) = Load[w] : &:r1767_2, ~m?
# 1767| mu1767_4(int) = Store[w2] : &:r1767_1, r1767_3
# 1767| Block 4
# 1767| r1767_1(glval<int>) = VariableAddress[x] :
# 1767| r1767_2(int) = Load[x] : &:r1767_1, ~m?
# 1767| r1767_3(glval<int>) = VariableAddress[w] :
# 1767| mu1767_4(int) = Store[w] : &:r1767_3, r1767_2
# 1767| r1767_5(glval<int>) = VariableAddress[w2] :
# 1767| r1767_6(int) = Load[w2] : &:r1767_5, ~m?
# 1767| r1767_7(int) = Constant[0] :
# 1767| r1767_8(bool) = CompareNE : r1767_6, r1767_7
# 1767| r1767_9(bool) = CopyValue : r1767_8
# 1767| v1767_10(void) = ConditionalBranch : r1767_9
#-----| False -> Block 8
#-----| True -> Block 7
# 1767| r1767_6(glval<int>) = VariableAddress[w] :
# 1767| r1767_7(int) = Load[w] : &:r1767_6, ~m?
# 1767| mu1767_8(int) = Store[w2] : &:r1767_5, r1767_7
# 1767| r1767_9(glval<int>) = VariableAddress[w2] :
# 1767| r1767_10(int) = Load[w2] : &:r1767_9, ~m?
# 1767| r1767_11(int) = Constant[0] :
# 1767| r1767_12(bool) = CompareNE : r1767_10, r1767_11
# 1767| r1767_13(bool) = CopyValue : r1767_12
# 1767| v1767_14(void) = ConditionalBranch : r1767_13
#-----| False -> Block 6
#-----| True -> Block 5
# 1768| Block 7
# 1768| Block 5
# 1768| r1768_1(glval<int>) = VariableAddress[x] :
# 1768| r1768_2(int) = Load[x] : &:r1768_1, ~m?
# 1768| r1768_3(glval<int>) = VariableAddress[w] :
@@ -9513,33 +9515,37 @@ ir.cpp:
# 1768| r1768_5(int) = Add : r1768_2, r1768_4
# 1768| r1768_6(glval<int>) = VariableAddress[x] :
# 1768| mu1768_7(int) = Store[x] : &:r1768_6, r1768_5
#-----| Goto -> Block 8
#-----| Goto -> Block 6
# 1771| Block 8
# 1771| r1771_1(glval<int>) = VariableAddress[v2] :
# 1771| r1771_2(glval<int>) = VariableAddress :
# 1771| r1771_3(int) = Load[?] : &:r1771_2, ~m?
# 1771| mu1771_4(int) = Store[v2] : &:r1771_1, r1771_3
# 1771| Block 6
# 1771| r1771_1(glval<int>) = VariableAddress[v] :
# 1771| r1771_2(glval<int>) = VariableAddress[x] :
# 1771| r1771_3(int) = Load[x] : &:r1771_2, ~m?
# 1771| mu1771_4(int) = Store[v] : &:r1771_1, r1771_3
# 1771| r1771_5(glval<int>) = VariableAddress[v2] :
# 1771| r1771_6(int) = Load[v2] : &:r1771_5, ~m?
# 1771| r1771_7(int) = Constant[0] :
# 1771| r1771_8(bool) = CompareNE : r1771_6, r1771_7
# 1771| r1771_9(bool) = CopyValue : r1771_8
# 1771| v1771_10(void) = ConditionalBranch : r1771_9
#-----| False -> Block 10
#-----| True -> Block 9
# 1771| r1771_6(glval<int>) = VariableAddress[v] :
# 1771| r1771_7(int) = Load[v] : &:r1771_6, ~m?
# 1771| mu1771_8(int) = Store[v2] : &:r1771_5, r1771_7
# 1771| r1771_9(glval<int>) = VariableAddress[v2] :
# 1771| r1771_10(int) = Load[v2] : &:r1771_9, ~m?
# 1771| r1771_11(int) = Constant[0] :
# 1771| r1771_12(bool) = CompareNE : r1771_10, r1771_11
# 1771| r1771_13(bool) = CopyValue : r1771_12
# 1771| v1771_14(void) = ConditionalBranch : r1771_13
#-----| False -> Block 8
#-----| True -> Block 7
# 1772| Block 9
# 1772| Block 7
# 1772| r1772_1(glval<int>) = VariableAddress[x] :
# 1772| r1772_2(int) = Load[x] : &:r1772_1, ~m?
# 1772| r1772_3(glval<int>) = VariableAddress :
# 1772| r1772_4(int) = Load[?] : &:r1772_3, ~m?
# 1772| r1772_3(glval<int>) = VariableAddress[v] :
# 1772| r1772_4(int) = Load[v] : &:r1772_3, ~m?
# 1772| r1772_5(int) = Add : r1772_2, r1772_4
# 1772| r1772_6(glval<int>) = VariableAddress[x] :
# 1772| mu1772_7(int) = Store[x] : &:r1772_6, r1772_5
#-----| Goto -> Block 10
#-----| Goto -> Block 8
# 1775| Block 10
# 1775| Block 8
# 1775| r1775_1(glval<int>) = VariableAddress[z] :
# 1775| r1775_2(glval<int>) = VariableAddress[x] :
# 1775| r1775_3(int) = Load[x] : &:r1775_2, ~m?
@@ -9549,10 +9555,10 @@ ir.cpp:
# 1776| r1776_3(int) = Constant[0] :
# 1776| r1776_4(bool) = CompareNE : r1776_2, r1776_3
# 1776| v1776_5(void) = ConditionalBranch : r1776_4
#-----| False -> Block 12
#-----| True -> Block 11
#-----| False -> Block 10
#-----| True -> Block 9
# 1777| Block 11
# 1777| Block 9
# 1777| r1777_1(glval<int>) = VariableAddress[x] :
# 1777| r1777_2(int) = Load[x] : &:r1777_1, ~m?
# 1777| r1777_3(glval<int>) = VariableAddress[z] :
@@ -9560,9 +9566,9 @@ ir.cpp:
# 1777| r1777_5(int) = Add : r1777_2, r1777_4
# 1777| r1777_6(glval<int>) = VariableAddress[x] :
# 1777| mu1777_7(int) = Store[x] : &:r1777_6, r1777_5
#-----| Goto -> Block 12
#-----| Goto -> Block 10
# 1780| Block 12
# 1780| Block 10
# 1780| r1780_1(glval<int>) = VariableAddress[z2] :
# 1780| r1780_2(glval<int>) = VariableAddress[z] :
# 1780| r1780_3(int) = Load[z] : &:r1780_2, ~m?
@@ -9573,19 +9579,19 @@ ir.cpp:
# 1780| r1780_8(bool) = CompareNE : r1780_6, r1780_7
# 1780| r1780_9(bool) = CopyValue : r1780_8
# 1780| v1780_10(void) = ConditionalBranch : r1780_9
#-----| False -> Block 14
#-----| True -> Block 13
#-----| False -> Block 12
#-----| True -> Block 11
# 1781| Block 13
# 1781| Block 11
# 1781| r1781_1(glval<int>) = VariableAddress[z2] :
# 1781| r1781_2(int) = Load[z2] : &:r1781_1, ~m?
# 1781| r1781_3(glval<int>) = VariableAddress[x] :
# 1781| r1781_4(int) = Load[x] : &:r1781_3, ~m?
# 1781| r1781_5(int) = Add : r1781_4, r1781_2
# 1781| mu1781_6(int) = Store[x] : &:r1781_3, r1781_5
#-----| Goto -> Block 14
#-----| Goto -> Block 12
# 1783| Block 14
# 1783| Block 12
# 1783| v1783_1(void) = NoOp :
# 1757| v1757_6(void) = ReturnVoid :
# 1757| v1757_7(void) = AliasedUse : ~m?
@@ -9598,42 +9604,40 @@ ir.cpp:
# 1785| mu1785_3(unknown) = InitializeNonLocal :
# 1785| r1785_4(glval<int>) = VariableAddress[x] :
# 1785| mu1785_5(int) = InitializeParameter[x] : &:r1785_4
# 1786| r1786_1(glval<int>) = VariableAddress[y] :
# 1786| r1786_2(glval<int>) = VariableAddress[x] :
# 1786| r1786_3(int) = Load[x] : &:r1786_2, ~m?
# 1786| mu1786_4(int) = Store[y] : &:r1786_1, r1786_3
# 1786| r1786_5(glval<int>) = VariableAddress[x] :
# 1786| r1786_6(int) = Load[x] : &:r1786_5, ~m?
# 1786| r1786_7(int) = Constant[1] :
# 1786| r1786_8(int) = Add : r1786_6, r1786_7
# 1786| v1786_9(void) = Switch : r1786_8
#-----| Default -> Block 1
# 1786| (no string representation)
# 1786| CopyValue: (condition decl)
# 1786| Switch: switch (...) ...
#-----| Default -> Block 3
# 1792| (no string representation)
# 1792| CopyValue: (condition decl)
# 1792| Switch: switch (...) ...
#-----| Default -> Block 4
# 1786| Block 1
# 1786| r1786_1(glval<int>) = VariableAddress[x] :
# 1786| r1786_2(int) = Load[x] : &:r1786_1, ~m?
# 1786| r1786_3(int) = Constant[1] :
# 1786| r1786_4(int) = Add : r1786_2, r1786_3
# 1792| Block 1
# 1792| r1792_1(glval<int>) = VariableAddress[x] :
# 1792| r1792_2(int) = Load[x] : &:r1792_1, ~m?
# 1792| r1792_3(int) = Constant[1] :
# 1792| r1792_4(int) = Add : r1792_2, r1792_3
# 1787| Block 3
# 1787| Block 1
# 1787| v1787_1(void) = NoOp :
# 1788| r1788_1(glval<int>) = VariableAddress[x] :
# 1788| r1788_2(int) = Load[x] : &:r1788_1, ~m?
# 1788| r1788_3(glval<int>) = VariableAddress :
# 1788| r1788_4(int) = Load[?] : &:r1788_3, ~m?
# 1788| r1788_3(glval<int>) = VariableAddress[y] :
# 1788| r1788_4(int) = Load[y] : &:r1788_3, ~m?
# 1788| r1788_5(int) = Add : r1788_2, r1788_4
# 1788| r1788_6(glval<int>) = VariableAddress[x] :
# 1788| mu1788_7(int) = Store[x] : &:r1788_6, r1788_5
# 1791| r1791_1(glval<int>) = VariableAddress[w] :
# 1791| mu1791_2(int) = Uninitialized[w] : &:r1791_1
# 1792| r1792_1(glval<int>) = VariableAddress[x] :
# 1792| r1792_2(int) = Load[x] : &:r1792_1, ~m?
# 1792| r1792_3(glval<int>) = VariableAddress[w] :
# 1792| mu1792_4(int) = Store[w] : &:r1792_3, r1792_2
# 1792| r1792_5(glval<int>) = VariableAddress[x] :
# 1792| r1792_6(int) = Load[x] : &:r1792_5, ~m?
# 1792| r1792_7(int) = Constant[1] :
# 1792| r1792_8(int) = Add : r1792_6, r1792_7
# 1792| v1792_9(void) = Switch : r1792_8
#-----| Default -> Block 2
# 1793| Block 4
# 1793| Block 2
# 1793| v1793_1(void) = NoOp :
# 1794| r1794_1(glval<int>) = VariableAddress[x] :
# 1794| r1794_2(int) = Load[x] : &:r1794_1, ~m?
@@ -9642,17 +9646,21 @@ ir.cpp:
# 1794| r1794_5(int) = Add : r1794_2, r1794_4
# 1794| r1794_6(glval<int>) = VariableAddress[x] :
# 1794| mu1794_7(int) = Store[x] : &:r1794_6, r1794_5
# 1797| r1797_1(glval<int>) = VariableAddress[w2] :
# 1797| r1797_2(glval<int>) = VariableAddress[w] :
# 1797| r1797_3(int) = Load[w] : &:r1797_2, ~m?
# 1797| mu1797_4(int) = Store[w2] : &:r1797_1, r1797_3
# 1797| r1797_1(glval<int>) = VariableAddress[x] :
# 1797| r1797_2(int) = Load[x] : &:r1797_1, ~m?
# 1797| r1797_3(glval<int>) = VariableAddress[w] :
# 1797| mu1797_4(int) = Store[w] : &:r1797_3, r1797_2
# 1797| r1797_5(glval<int>) = VariableAddress[w2] :
# 1797| r1797_6(int) = Load[w2] : &:r1797_5, ~m?
# 1797| r1797_7(int) = CopyValue : r1797_6
# 1797| v1797_8(void) = Switch : r1797_7
#-----| Default -> Block 5
# 1797| r1797_6(glval<int>) = VariableAddress[w] :
# 1797| r1797_7(int) = Load[w] : &:r1797_6, ~m?
# 1797| mu1797_8(int) = Store[w2] : &:r1797_5, r1797_7
# 1797| r1797_9(glval<int>) = VariableAddress[w2] :
# 1797| r1797_10(int) = Load[w2] : &:r1797_9, ~m?
# 1797| r1797_11(int) = CopyValue : r1797_10
# 1797| v1797_12(void) = Switch : r1797_11
#-----| Default -> Block 3
# 1798| Block 5
# 1798| Block 3
# 1798| v1798_1(void) = NoOp :
# 1799| r1799_1(glval<int>) = VariableAddress[x] :
# 1799| r1799_2(int) = Load[x] : &:r1799_1, ~m?
@@ -9661,22 +9669,26 @@ ir.cpp:
# 1799| r1799_5(int) = Add : r1799_2, r1799_4
# 1799| r1799_6(glval<int>) = VariableAddress[x] :
# 1799| mu1799_7(int) = Store[x] : &:r1799_6, r1799_5
# 1802| r1802_1(glval<int>) = VariableAddress[v2] :
# 1802| r1802_2(glval<int>) = VariableAddress :
# 1802| r1802_3(int) = Load[?] : &:r1802_2, ~m?
# 1802| mu1802_4(int) = Store[v2] : &:r1802_1, r1802_3
# 1802| r1802_1(glval<int>) = VariableAddress[v] :
# 1802| r1802_2(glval<int>) = VariableAddress[x] :
# 1802| r1802_3(int) = Load[x] : &:r1802_2, ~m?
# 1802| mu1802_4(int) = Store[v] : &:r1802_1, r1802_3
# 1802| r1802_5(glval<int>) = VariableAddress[v2] :
# 1802| r1802_6(int) = Load[v2] : &:r1802_5, ~m?
# 1802| r1802_7(int) = CopyValue : r1802_6
# 1802| v1802_8(void) = Switch : r1802_7
#-----| Default -> Block 6
# 1802| r1802_6(glval<int>) = VariableAddress[v] :
# 1802| r1802_7(int) = Load[v] : &:r1802_6, ~m?
# 1802| mu1802_8(int) = Store[v2] : &:r1802_5, r1802_7
# 1802| r1802_9(glval<int>) = VariableAddress[v2] :
# 1802| r1802_10(int) = Load[v2] : &:r1802_9, ~m?
# 1802| r1802_11(int) = CopyValue : r1802_10
# 1802| v1802_12(void) = Switch : r1802_11
#-----| Default -> Block 4
# 1803| Block 6
# 1803| Block 4
# 1803| v1803_1(void) = NoOp :
# 1804| r1804_1(glval<int>) = VariableAddress[x] :
# 1804| r1804_2(int) = Load[x] : &:r1804_1, ~m?
# 1804| r1804_3(glval<int>) = VariableAddress :
# 1804| r1804_4(int) = Load[?] : &:r1804_3, ~m?
# 1804| r1804_3(glval<int>) = VariableAddress[v] :
# 1804| r1804_4(int) = Load[v] : &:r1804_3, ~m?
# 1804| r1804_5(int) = Add : r1804_2, r1804_4
# 1804| r1804_6(glval<int>) = VariableAddress[x] :
# 1804| mu1804_7(int) = Store[x] : &:r1804_6, r1804_5
@@ -9687,9 +9699,9 @@ ir.cpp:
# 1808| r1808_1(glval<int>) = VariableAddress[z] :
# 1808| r1808_2(int) = Load[z] : &:r1808_1, ~m?
# 1808| v1808_3(void) = Switch : r1808_2
#-----| Default -> Block 7
#-----| Default -> Block 5
# 1809| Block 7
# 1809| Block 5
# 1809| v1809_1(void) = NoOp :
# 1810| r1810_1(glval<int>) = VariableAddress[x] :
# 1810| r1810_2(int) = Load[x] : &:r1810_1, ~m?
@@ -9706,9 +9718,9 @@ ir.cpp:
# 1813| r1813_6(int) = Load[z2] : &:r1813_5, ~m?
# 1813| r1813_7(int) = CopyValue : r1813_6
# 1813| v1813_8(void) = Switch : r1813_7
#-----| Default -> Block 8
#-----| Default -> Block 6
# 1814| Block 8
# 1814| Block 6
# 1814| v1814_1(void) = NoOp :
# 1815| r1815_1(glval<int>) = VariableAddress[z2] :
# 1815| r1815_2(int) = Load[z2] : &:r1815_1, ~m?

View File

@@ -6,8 +6,6 @@ missingOperandType
duplicateChiOperand
sideEffectWithoutPrimary
instructionWithoutSuccessor
| ir.cpp:1757:28:1757:28 | InitializeParameter: x | Instruction 'InitializeParameter: x' has no successors in function '$@'. | ir.cpp:1757:6:1757:22 | void if_initialization(int) | void if_initialization(int) |
| ir.cpp:1785:32:1785:32 | InitializeParameter: x | Instruction 'InitializeParameter: x' has no successors in function '$@'. | ir.cpp:1785:6:1785:26 | void switch_initialization(int) | void switch_initialization(int) |
ambiguousSuccessors
unexplainedLoop
unnecessaryPhiInstruction

View File

@@ -6,8 +6,6 @@ missingOperandType
duplicateChiOperand
sideEffectWithoutPrimary
instructionWithoutSuccessor
| ir.cpp:1757:28:1757:28 | InitializeParameter: x | Instruction 'InitializeParameter: x' has no successors in function '$@'. | ir.cpp:1757:6:1757:22 | void if_initialization(int) | void if_initialization(int) |
| ir.cpp:1785:32:1785:32 | InitializeParameter: x | Instruction 'InitializeParameter: x' has no successors in function '$@'. | ir.cpp:1785:6:1785:26 | void switch_initialization(int) | void switch_initialization(int) |
ambiguousSuccessors
unexplainedLoop
unnecessaryPhiInstruction