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Convert post-update logic to IR (part 3)
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@@ -760,18 +760,27 @@ module Public {
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predicate isReceiverOf(MethodDecl m) { parm.isReceiverOf(m) }
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}
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private Node getADirectlyWrittenNode() {
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exists(Write w | w.writesComponent(result, _)) or
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result = DataFlow::exprNode(any(SendStmt s).getChannel())
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}
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private DataFlow::Node getAccessPathPredecessor(DataFlow::Node node) {
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result = node.(PointerDereferenceNode).getOperand()
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private IR::Instruction getADirectlyWrittenInsn() {
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exists(Write w | w.writesComponentInstruction(result, _))
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or
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result = node.(ComponentReadNode).getBase()
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result = IR::evalExprInstruction(any(SendStmt s).getChannel())
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}
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private Node getAWrittenNode() { result = getAccessPathPredecessor*(getADirectlyWrittenNode()) }
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private IR::Instruction getAccessPathPredecessorInsn(IR::Instruction insn) {
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exists(Expr e1, Expr e2 |
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insn = IR::evalExprInstruction(e1) and result = IR::evalExprInstruction(e2)
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e2 = e1.(DerefExpr).getOperand() or e2 = e1.(StarExpr).getBase()
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)
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or
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exists(Expr e | insn = IR::implicitDerefInstruction(e) and result = IR::evalExprInstruction(e))
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or
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result = insn.(IR::ComponentReadInstruction).getBase()
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}
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private IR::Instruction getAWrittenInsn() {
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result = getAccessPathPredecessorInsn*(getADirectlyWrittenInsn())
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}
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/**
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* Holds if `tp` is a type that may (directly or indirectly) reference a memory location.
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@@ -831,13 +840,11 @@ module Public {
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)
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) and
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mutableType(insn.getResultType())
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or
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insn = getAWrittenInsn()
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}
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predicate hasPostUpdateNode(Node preupd) {
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insnHasPostUpdateNode(preupd.asInstruction())
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or
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preupd = getAWrittenNode()
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}
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predicate hasPostUpdateNode(Node preupd) { insnHasPostUpdateNode(preupd.asInstruction()) }
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private class DefaultPostUpdateNode extends PostUpdateNode {
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Node preupd;
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